"""Hardware blocks for pe_accel.

Each block is a concurrent SimPy process modeling one functional unit:
  - DmaInBlock:   HBM → TCM tile reads (issues real DmaReadCmd to PE_DMA)
  - DmaWbBlock:   TCM → HBM tile writes (issues real DmaWriteCmd to PE_DMA)
  - GemmBlock:    2-stage MAC pipeline (fetch + compute)
  - MathBlock:    K-accumulation (GEMM helper) + element-wise ops (exp, log, etc.)
  - TcmBlock:     TCM access serialization with BW-based timing
"""
from kernbench.components.custom.pe_accel.blocks.dma_in import DmaInBlock
from kernbench.components.custom.pe_accel.blocks.dma_wb import DmaWbBlock
from kernbench.components.custom.pe_accel.blocks.gemm import GemmBlock
from kernbench.components.custom.pe_accel.blocks.math import MathBlock
from kernbench.components.custom.pe_accel.blocks.tcm import TcmBlock, TcmRequest

__all__ = ["DmaInBlock", "DmaWbBlock", "GemmBlock", "MathBlock", "TcmBlock", "TcmRequest"]
