From 3ea4fa90f86f77f09b15bbdfbafc7902e809d597 Mon Sep 17 00:00:00 2001 From: Yangwook Kang Date: Sun, 5 Apr 2026 00:38:27 -0700 Subject: [PATCH] =?UTF-8?q?Cube-view:=20increase=2045=C2=B0=20stub=20lengt?= =?UTF-8?q?h=20and=20component=20gap=20for=20visibility?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Stub length increased to 12px (PE/HBM) and 10px (UCIe). Gap between router and component increased to 30px so both 45° stubs (router end + component end) are clearly visible. Co-Authored-By: Claude Opus 4.6 (1M context) --- docs/diagrams/cube_view.svg | 108 +++++++++++++-------------- src/kernbench/topology/visualizer.py | 15 ++-- 2 files changed, 62 insertions(+), 61 deletions(-) diff --git a/docs/diagrams/cube_view.svg b/docs/diagrams/cube_view.svg index 24ae6da..26d366b 100644 --- a/docs/diagrams/cube_view.svg +++ b/docs/diagrams/cube_view.svg @@ -133,14 +133,14 @@ r0c0 - - PE0 - + + PE0 + r0c1 - - PE1 - + + PE1 + r0c2 @@ -159,19 +159,19 @@ r1c3 r1c4 - - PE2 - + + PE2 + r1c5 - - PE3 - + + PE3 + r2c0 - - M_CPU - + + M_CPU + r2c1 @@ -180,9 +180,9 @@ r2c5 r3c0 - - SRAM - + + SRAM + r3c1 @@ -191,14 +191,14 @@ r3c5 r4c0 - - PE4 - + + PE4 + r4c1 - - PE5 - + + PE5 + r4c2 @@ -217,86 +217,86 @@ r5c3 r5c4 - - PE6 - + + PE6 + r5c5 - - PE7 - - + + PE7 + + 256GB/s - + 256GB/s - + 256GB/s - + 256GB/s - + 256GB/s - + 256GB/s - + 256GB/s - + 256GB/s UCIe-W c0 - + c1 - + c2 - + c3 - + UCIe-N c0 - + c1 - + c2 - + c3 - + UCIe-E c0 - + c1 - + c2 - + c3 - + UCIe-S c0 - + c1 - + c2 - + c3 - + PE Router diff --git a/src/kernbench/topology/visualizer.py b/src/kernbench/topology/visualizer.py index cd1e30b..fe6ac8c 100644 --- a/src/kernbench/topology/visualizer.py +++ b/src/kernbench/topology/visualizer.py @@ -607,21 +607,22 @@ def _render_cube_view_svg(view: ViewGraph, spec: dict) -> str: # Use left/right offset for multiple blocks on same router offset_x = (bi - (len(blocks) - 1) / 2) * (blk_w + 4) + gap = 30 # px gap between router and component (room for 2 × 45° stubs) if kind == "mcpu": # M_CPU: place above (north of) router bx = px - blk_w / 2 - by = py - r_size - blk_h - 8 + by = py - r_size - blk_h - gap elif kind == "sram": # SRAM: place below (south of) router bx = px - blk_w / 2 - by = py + r_size + 8 + by = py + r_size + gap else: # PE: place above (top half) or below (bottom half) bx = px + offset_x - blk_w / 2 if is_top: - by = py - r_size - blk_h - 4 - bi * (blk_h + 2) + by = py - r_size - blk_h - gap - bi * (blk_h + 2) else: - by = py + r_size + 4 + bi * (blk_h + 2) + by = py + r_size + gap + bi * (blk_h + 2) # Block rect parts.append( @@ -638,7 +639,7 @@ def _render_cube_view_svg(view: ViewGraph, spec: dict) -> str: ) # Connector: router ─45°─ straight ─45°─ component sc = style["stroke"] - d = 6 # 45° stub length (px) + d = 12 # 45° stub length (px) if kind == "mcpu": # Router top → 45° NW stub → vertical → 45° into block bottom rx2, ry2 = px, py - r_size @@ -705,7 +706,7 @@ def _render_cube_view_svg(view: ViewGraph, spec: dict) -> str: tgx, tgy = _pe_hbm_targets[pe_id] r_edge_y = rpy + r_size if rpy < hbm_y else rpy - r_size # 45° stub from router → vertical → 45° into HBM port - d = 8 # stub length + d = 12 # stub length sx = tgx - rpx sd = d if sx >= 0 else -d if rpy < hbm_y: @@ -819,7 +820,7 @@ def _render_cube_view_svg(view: ViewGraph, spec: dict) -> str: # Connector: router ─45°stub─ straight ─45°stub─ UCIe port rpx, rpy = mm2px(crx, cry) - d = 6 + d = 10 if direction == "N": rx, ry = rpx, rpy - r_size tx, ty = lx, cy_box + ch