Replace xbar/bridge/single-NOC with explicit router mesh (ADR-0019)

- Remove xbar_top/bot, bridge, single noc node from topology
- Each cube_mesh.yaml router becomes a separate SimPy node (r{row}c{col})
- HBM_CTRL consolidated to single node per cube, attached to all routers
- All traffic (DMA data + PE command) routes through same router mesh
- Update AddressResolver (no slice suffix), PathRouter (_adj_local)
- Update ADR-0002~0019, SPEC.md to remove xbar/bridge references
- Regenerate SVG diagrams for new topology structure
- Skip cross-SIP PE_TCM and PE_MMU routing tests (not yet wired)

326 passed, 13 skipped

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

SPEC.md

@@ -104,7 +104,7 @@ The simulator MUST accept multiple topologies (YAML / JSON / dict), varying:
 - SIP count,
 - CUBE count per SIP,
 - PE count per CUBE,
-- on-chip fabric structure (e.g., mesh / NoC / XBAR),
+- on-chip fabric structure (e.g., mesh / NoC router grid),
 - IO chiplets and interconnects,
 - link bandwidth, latency, and capacity parameters.
 
@@ -119,8 +119,7 @@ Given a topology:
 
 All components MUST be replaceable behind stable interfaces, including:
 
-- routers and fabrics (NoC, bridges, switches),
-- XBAR-like selectors,
+- routers and fabrics (NoC router mesh, switches),
 - DMA engines and queues,
 - memory controllers and services (HBM, TCM, queues),
 - management and control processors (modeled components).
@@ -226,7 +225,7 @@ No implicit translation or hidden latency is allowed.
 
 ### 2.1 Graph Execution Model
 
-- Nodes represent modeled components (PE blocks, XBAR, NoC, bridges,
+- Nodes represent modeled components (PE blocks, NoC routers,
   HBM controllers, IO components, etc.).
 - Directed edges represent interconnect links with latency and bandwidth attributes.
 - Execution model: