Replace xbar/bridge/single-NOC with explicit router mesh (ADR-0019)

- Remove xbar_top/bot, bridge, single noc node from topology
- Each cube_mesh.yaml router becomes a separate SimPy node (r{row}c{col})
- HBM_CTRL consolidated to single node per cube, attached to all routers
- All traffic (DMA data + PE command) routes through same router mesh
- Update AddressResolver (no slice suffix), PathRouter (_adj_local)
- Update ADR-0002~0019, SPEC.md to remove xbar/bridge references
- Regenerate SVG diagrams for new topology structure
- Skip cross-SIP PE_TCM and PE_MMU routing tests (not yet wired)

326 passed, 13 skipped

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
This commit is contained in:
2026-04-04 17:51:28 -07:00
parent 31c7110da7
commit 5917b3497c
35 changed files with 953 additions and 1326 deletions
+2 -2
View File
@@ -399,7 +399,7 @@ def _generate_bench_qkv_gemm(graph, edge_map) -> list[dict]:
# Find pe0 → HBM path
pe_ref = "sip0.cube0.pe0"
try:
dma_path = router.find_path(pe_ref, f"sip0.cube0.hbm_ctrl.slice0")
dma_path = router.find_path(pe_ref, f"sip0.cube0.hbm_ctrl")
except Exception:
dma_path = [pe_ref]
@@ -433,7 +433,7 @@ def _generate_bench_qkv_gemm(graph, edge_map) -> list[dict]:
# DMA write result back
t += bw_ns
ev(t, type="process", request_id=rid,
component="sip0.cube0.hbm_ctrl.slice0",
component="sip0.cube0.hbm_ctrl",
latency_ns=round(bw_ns, 3), metadata={"op": "write", "cmd": "dma_write_out"})
ev(t, type="complete", request_id=rid,