From 5c6abe6d129b198b9318499db9d100a8cf75f844 Mon Sep 17 00:00:00 2001 From: Yangwook Kang Date: Sat, 4 Apr 2026 21:51:41 -0700 Subject: [PATCH] Reduce SRAM/UCIe/M_CPU/HBM node sizes, thin HBM and mesh links Shrink cube-view component nodes to avoid clutter. HBM and router_mesh edge lines made thinner and more transparent. Co-Authored-By: Claude Opus 4.6 (1M context) --- docs/diagrams/cube_view.svg | 304 +++++++++++++-------------- src/kernbench/topology/visualizer.py | 15 +- 2 files changed, 166 insertions(+), 153 deletions(-) diff --git a/docs/diagrams/cube_view.svg b/docs/diagrams/cube_view.svg index 98326fa..c3b326a 100644 --- a/docs/diagrams/cube_view.svg +++ b/docs/diagrams/cube_view.svg @@ -5,113 +5,113 @@ HBM - + 3.0mm - + 2.5mm - + 3.0mm - + 2.5mm - + 3.0mm - + 2.5mm - + 2.0mm - + 2.5mm - + 3.0mm - + 2.5mm - + 2.5mm - + 3.0mm - + 1.5mm - + 3.0mm - + 1.5mm - + 3.0mm - + 6.0mm - + 2.0mm - + 6.0mm - + 3.0mm - + 1.5mm - + 1.5mm - + 3.0mm - + 3.0mm - + 8.0mm - + 3.0mm - + 3.0mm - + 3.0mm - + 3.0mm - + 3.0mm - + 1.5mm - + 8.0mm - + 1.5mm - + 3.0mm - + 1.5mm - + 1.5mm - + 3.0mm - + 2.5mm - + 3.0mm - + 2.5mm - + 3.0mm - + 2.5mm - + 2.0mm - + 2.5mm - + 3.0mm - + 2.5mm - + 2.5mm - + 3.0mm - + 3.0mm - + 3.0mm - + 2.0mm - + 3.0mm - + @@ -122,7 +122,7 @@ - + @@ -145,10 +145,10 @@ - + - + @@ -158,14 +158,14 @@ - + - + @@ -184,14 +184,14 @@ - + - + @@ -200,116 +200,116 @@ - - UCIe-N - + + UCIe-N + UCIe-N C0 - + UCIe-N C1 - + UCIe-N C2 - + UCIe-N C3 - - UCIe-S - + + UCIe-S + UCIe-S C0 - + UCIe-S C1 - + UCIe-S C2 - + UCIe-S C3 - - UCIe-E - + + UCIe-E + UCIe-E C0 - + UCIe-E C1 - + UCIe-E C2 - + UCIe-E C3 - - UCIe-W - + + UCIe-W + UCIe-W C0 - + UCIe-W C1 - + UCIe-W C2 - + UCIe-W C3 - + M CPU - - HBM CTRL - + + HBM CTRL + SRAM - - R0C0 - - R0C1 - - R0C2 - - R0C3 - - R0C4 - - R0C5 - - R1C0 - - R1C1 - - R1C2 - - R1C3 - - R1C4 - - R1C5 - - R2C0 - - R2C1 - - R2C4 - - R2C5 - - R3C0 - - R3C1 - - R3C4 - - R3C5 - - R4C0 - - R4C1 - - R4C2 - - R4C3 - - R4C4 - - R4C5 - - R5C0 - - R5C1 - - R5C2 - - R5C3 - - R5C4 - - R5C5 + + R0C0 + + R0C1 + + R0C2 + + R0C3 + + R0C4 + + R0C5 + + R1C0 + + R1C1 + + R1C2 + + R1C3 + + R1C4 + + R1C5 + + R2C0 + + R2C1 + + R2C4 + + R2C5 + + R3C0 + + R3C1 + + R3C4 + + R3C5 + + R4C0 + + R4C1 + + R4C2 + + R4C3 + + R4C4 + + R4C5 + + R5C0 + + R5C1 + + R5C2 + + R5C3 + + R5C4 + + R5C5 PE0 diff --git a/src/kernbench/topology/visualizer.py b/src/kernbench/topology/visualizer.py index 92149af..4fbc01d 100644 --- a/src/kernbench/topology/visualizer.py +++ b/src/kernbench/topology/visualizer.py @@ -62,7 +62,12 @@ _KIND_SIZE: dict[str, tuple[float, float]] = { "cube": (6.0, 4.0), "iochiplet": (4.0, 1.5), "switch": (5.0, 1.5), - "noc_router": (1.2, 0.8), + "noc_router": (1.0, 0.7), + "ucie_port": (1.2, 0.7), + "ucie_conn": (0.8, 0.5), + "sram": (1.4, 0.7), + "m_cpu": (1.4, 0.7), + "hbm_ctrl": (1.8, 0.8), } @@ -274,6 +279,14 @@ def _draw_edge( color = _EDGE_COLORS.get(edge.kind, "#94a3b8") width = "1.5" if edge.kind == "pe_internal" else "1" opacity = "0.6" if edge.kind in ("command", "noc_to_ucie") else "0.8" + # HBM links: thin and faint to reduce clutter + if edge.kind in ("router_to_hbm", "hbm_to_router"): + width = "0.5" + opacity = "0.3" + # Router mesh links: thin + if edge.kind == "router_mesh": + width = "0.5" + opacity = "0.4" if edge.kind in _FANOUT_KINDS and view.name == "cube": # Orthogonal routing: src→horizontal→vertical→dst with per-edge offset.