Latency model: HBM PC striping + chunk-loop drain (ADR-0033)

Previous model double-counted slow-upstream paths (e.g., 64KB via UCIe
128 GB/s was ~2x pessimistic). HBM CTRL now distributes bursts across
8 pseudo-channels via global round-robin, with per-chunk commit timing
that pipelines correctly against the bottleneck link's data arrival.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>

tests/test_phase_a_components.py

@@ -119,9 +119,18 @@ def test_hbm_ctrl_terminal_succeeds_done():
     assert done_event.triggered
 
 
-def test_hbm_ctrl_resource_serializes_requests():
-    """HbmCtrlComponent with capacity=1 serializes concurrent requests."""
-    node = _node("builtin.hbm_ctrl", {"overhead_ns": 5.0, "capacity": 1})
+def test_hbm_ctrl_concurrent_zero_byte_requests_parallel():
+    """HbmCtrlComponent under the PC striping model (ADR-0033 D1) processes
+    zero-byte transactions in parallel — they claim no PC chunks, so only
+    the per-request `overhead_ns` applies and both finish concurrently.
+
+    This supersedes the prior dual-channel `simpy.Resource(capacity=1)`
+    serialization assertion (ADR-0033 supersedes the dual-channel model).
+    """
+    node = _node(
+        "builtin.hbm_ctrl",
+        {"overhead_ns": 5.0, "num_pcs": 8, "pc_bw_gbs": 32.0, "burst_bytes": 256},
+    )
     comp = HbmCtrlComponent(node)
     env = simpy.Environment()
     in_store: simpy.Store = simpy.Store(env)
@@ -140,10 +149,10 @@ def test_hbm_ctrl_resource_serializes_requests():
     env.process(inject())
     env.run(until=done2)
 
-    # Both must be done; with serialization: t=5 + t=10
     assert done1.triggered
     assert done2.triggered
-    assert env.now == pytest.approx(10.0)
+    # Zero-byte txns occupy no PC; both finish at t = overhead_ns (parallel).
+    assert env.now == pytest.approx(5.0)
 
 
 # ── 4. Terminal: SramComponent succeeds done ─────────────────────────