ADR housekeeping: category prefixes, lifecycle folders, retroactive 0034-0037

Filename + lifecycle:
- ADR rename to ADR-NNNN-<cat>-title.md with 8 3-letter category prefixes
  (dev / mem / lat / prog / algo / par / api / ver). Numbers stay immutable.
- ADR Lifecycle split into 3 folders, documented in CLAUDE.md Part 2:
  docs/adr/ (Accepted), docs/adr-proposed/ (Proposed/Stub/Draft),
  docs/adr-history/ (Superseded/Merged). Status field gains "Draft" for
  retroactive docs pending verification.

Merges (one ADR per topic, no change-history annotations):
- ADR-0017 absorbs ADR-0019 (Cube NOC + per-PE HBM connectivity, 10 D-items)
- ADR-0014 absorbs ADR-0021 (PE pipeline execution model, 8 D-items incl.
  TileToken self-routing and multi-op composite epilogue scope)
- ADR-0023 absorbs docs/ipcq-dma-codesign-hw.md as new "HW Realization
  Notes (Informative)" section (D16-D23 + Open HW Questions). codesign-hw.md
  deleted; ADR-0019/0021 moved to adr-history with one-line stub status

Retroactive documentation (G4 closures, code-verified):
- ADR-0037 forwarding component (TransitComponent: first-flit overhead,
  serial worker, path-based routing, single impl/multiple names)
- ADR-0036 IO_CPU component (target_start_ns global barrier stamping,
  per-cube fan-out, response aggregation)
- ADR-0035 M_CPU & M_CPU.DMA component (3 fan-out paths, DMA Resources,
  target_start_ns passthrough)
- ADR-0034 HBM controller internal design (per-PC state, address-based
  selection, flit-aware per-flit commit, async finalize, command-only
  fallback path)

Content updates:
- ADR-0010 expanded to full CLI surface (run/probe/web), retitled
  "Command Line Interface and Execution Semantics"
- ADR-0007 D2 rewritten to current state; ADR-0015 supersession notes pruned
- ADR-0005 wrapped in Decision header with D1-D5; ADR-0022 metadata
  block replaced with standard Status header
- ADR-0024 trimmed to rank=SIP launcher essentials (D1-D4);
  ADR-0027 cleaned of supersession history
- ADR-0033 D6 cleanup: address-based PC selection moved out of future-work
  (now documented in ADR-0034 D3); related D1/D3 wording realigned
- Cross-references back-filled in 5 ADRs (G3 gaps closed)

Onboarding docs split:
- docs/onboarding/ created
- moved: hw-architecture-overview.md, latency-model.md, di-presentation.md,
  ccl-author-guide{,.en}.md
- references updated in README, ADR-0023{,.en}, src/kernbench/ccl/__init__.py

Source / test / yaml: ADR-NNNN cross-references in docstrings and YAML
comments updated after the merges (ADR-0021->0014 D6, ADR-0019->0017 D8).
No behavior change.

Tooling:
- tools/verify_adr_lang_pairs.py + tests/test_verify_adr_lang_pairs.py
  (ADR EN/KO pair invariant checker)
- .claude/commands/report.md tracked (/report slash command)
- .gitignore: allow .claude/commands/*.md while keeping settings files ignored

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>

topology.yaml

@@ -78,15 +78,15 @@ cube:
       scheduler_to_fetch_store_mm: 0.5
       dma_to_tcm_bw_gbs:       512.0
       dma_to_tcm_mm:           0.5
-      dma_to_fetch_store_mm:   0.0     # DMA → fetch_store chaining (ADR-0021)
+      dma_to_fetch_store_mm:   0.0     # DMA → fetch_store chaining (ADR-0014 D6)
       fetch_store_to_tcm_bw_gbs: 512.0
       fetch_store_to_tcm_mm:   0.0
-      fetch_store_to_gemm_mm:  0.0     # fetch → GEMM chaining (ADR-0021)
-      fetch_store_to_math_mm:  0.0     # fetch → MATH chaining (ADR-0021)
-      gemm_to_fetch_store_mm:  0.0     # GEMM → store chaining (ADR-0021)
-      gemm_to_math_mm:         0.0     # GEMM → MATH epilogue chaining (ADR-0021)
-      math_to_fetch_store_mm:  0.0     # MATH → store chaining (ADR-0021)
-      fetch_store_to_dma_mm:   0.0     # store → DMA writeback chaining (ADR-0021)
+      fetch_store_to_gemm_mm:  0.0     # fetch → GEMM chaining (ADR-0014 D6)
+      fetch_store_to_math_mm:  0.0     # fetch → MATH chaining (ADR-0014 D6)
+      gemm_to_fetch_store_mm:  0.0     # GEMM → store chaining (ADR-0014 D6)
+      gemm_to_math_mm:         0.0     # GEMM → MATH epilogue chaining (ADR-0014 D6)
+      math_to_fetch_store_mm:  0.0     # MATH → store chaining (ADR-0014 D6)
+      fetch_store_to_dma_mm:   0.0     # store → DMA writeback chaining (ADR-0014 D6)
       gemm_to_tcm_bw_gbs:      512.0
       gemm_to_tcm_mm:          0.5
       math_to_tcm_bw_gbs:      512.0
@@ -99,7 +99,7 @@ cube:
     hbm_total_gb_per_cube: 48
     hbm_slices_per_cube: 8
     hbm_total_bw_gbs: 1024.0
-    hbm_mapping_mode: n_to_one        # one_to_one | n_to_one (ADR-0019)
+    hbm_mapping_mode: n_to_one        # one_to_one | n_to_one (ADR-0017 D8)
     hbm_pseudo_channels: 64           # total pseudo channels per cube
     hbm_channels_per_pe: 8            # = pseudo_channels / pes_per_cube
     hbm_channel_bw_gbs: 32.0          # per-channel bandwidth (GB/s)
@@ -123,7 +123,7 @@ cube:
     per_connection_bw_gbs: 128.0   # BW per connection; 4 × 128 = 512 GB/s = UCIe PHY BW
 
   links:
-    # Router mesh links (ADR-0019)
+    # Router mesh links (ADR-0017 D5)
     router_link_bw_gbs: 256.0        # inter-router XY mesh link BW
     router_overhead_ns: 2.0          # per-router switching overhead
     pe_to_router_bw_gbs: 256.0      # PE_DMA ↔ router (= N × channel_bw)