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Rename impl names: add builtin. prefix for clear provenance

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- components.yaml: all builtin impls use builtin.xxx naming
- topology.yaml: all impl references updated to builtin.xxx
- builder.py: hardcoded ucie impl → builtin.ucie
- Tests: all impl string references updated

Convention: builtin.<name> for built-in, custom.<name> for user-defined.
382 tests passing.

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
This commit is contained in:
Yangwook Kang
2026-04-09 00:16:24 -07:00
parent 1d95df4bee
commit 81ce55571d
7 changed files with 87 additions and 82 deletions
Download Patch File Download Diff File Expand all files Collapse all files
tests/test_component_registry.py
+7 -7
View File
@@ -55,7 +55,7 @@ def test_registry_unknown_impl_raises_error():
def test_transit_component_yields_overhead_ns():
"""TransitComponent.run() yields exactly node.attrs['overhead_ns'] ns."""
node = _node("forwarding_v1", overhead_ns=3.0)
node = _node("builtin.forwarding", overhead_ns=3.0)
comp = TransitComponent(node)
env = simpy.Environment()
@@ -69,7 +69,7 @@ def test_transit_component_yields_overhead_ns():
def test_transit_component_zero_overhead_ns():
"""TransitComponent with overhead_ns=0 still yields (no infinite loop)."""
node = _node("noc_v1", overhead_ns=0.0)
node = _node("builtin.noc", overhead_ns=0.0)
comp = TransitComponent(node)
env = simpy.Environment()
@@ -100,7 +100,7 @@ def test_engine_component_override_is_called():
SpyXbar.calls = 0
graph = _graph()
engine = GraphEngine(graph, component_overrides={"forwarding_v1": SpyXbar})
engine = GraphEngine(graph, component_overrides={"builtin.forwarding": SpyXbar})
msg = MemoryReadMsg(
correlation_id="c", request_id="r",
src_sip=0, src_cube=0, src_pe=0,
@@ -108,7 +108,7 @@ def test_engine_component_override_is_called():
)
h = engine.submit(msg)
engine.wait(h)
# Path passes through router nodes (impl=forwarding_v1)
# Path passes through router nodes (impl=forwarding)
assert SpyXbar.calls > 0
@@ -140,7 +140,7 @@ def test_engine_component_model_latency():
def test_engine_override_is_scoped_to_impl():
"""forwarding_v1 override (ZeroRouter, no overhead) reduces total_ns.
"""forwarding override (ZeroRouter, no overhead) reduces total_ns.
Router nodes have overhead_ns=2.0. Replacing with zero-latency impl
removes router overhead from the path.
@@ -152,7 +152,7 @@ def test_engine_override_is_scoped_to_impl():
graph = _graph()
engine_default = GraphEngine(graph)
engine_override = GraphEngine(graph, component_overrides={"forwarding_v1": ZeroRouter})
engine_override = GraphEngine(graph, component_overrides={"builtin.forwarding": ZeroRouter})
msg = MemoryReadMsg(
correlation_id="c", request_id="r",
@@ -168,5 +168,5 @@ def test_engine_override_is_scoped_to_impl():
engine_override.wait(h_o)
_, t_override = engine_override.get_completion(h_o)
# ZeroRouter removes overhead from all forwarding_v1 nodes in path.
# ZeroRouter removes overhead from all forwarding nodes in path.
assert t_override["total_ns"] < t_default["total_ns"]
tests/test_mmu_component.py
+4 -4
View File
@@ -71,7 +71,7 @@ def test_mmu_unmap_msg_fields():
def test_pe_mmu_registry():
"""pe_mmu_v1 impl resolves in ComponentRegistry."""
"""pe_mmu impl resolves in ComponentRegistry."""
from kernbench.components.base import ComponentRegistry
from kernbench.components.builtin.pe_mmu import PeMmuComponent
from kernbench.topology.types import Node
@@ -79,7 +79,7 @@ def test_pe_mmu_registry():
node = Node(
id="sip0.cube0.pe0.pe_mmu",
kind="pe_mmu",
impl="pe_mmu_v1",
impl="builtin.pe_mmu",
pos_mm=None,
attrs={"tlb_overhead_ns": 0.5},
)
@@ -101,7 +101,7 @@ def test_pe_mmu_processes_map_msg():
node = Node(
id="sip0.cube0.pe0.pe_mmu",
kind="pe_mmu",
impl="pe_mmu_v1",
impl="builtin.pe_mmu",
pos_mm=None,
attrs={"tlb_overhead_ns": 0.5, "page_size": 4096},
)
@@ -158,7 +158,7 @@ def test_pe_dma_translates_va():
node = Node(
id="sip0.cube0.pe0.pe_dma",
kind="pe_dma",
impl="pe_dma_v1",
impl="builtin.pe_dma",
pos_mm=None,
attrs={"rd_engines": 1, "wr_engines": 1},
)
tests/test_pe_components.py
+13 -13
View File
@@ -65,15 +65,15 @@ def _hbm_pa(sip: int = 0, cube: int = 0, pe_id: int = 0) -> int:
def test_pe_registry_resolves_all():
"""All 6 PE component impl strings must resolve to their specific classes."""
expected = {
"pe_cpu_v1": PeCpuComponent,
"pe_scheduler_v1": PeSchedulerComponent,
"pe_dma_v1": PeDmaComponent,
"pe_gemm_v1": PeGemmComponent,
"pe_math_v1": PeMathComponent,
"pe_tcm_v1": PeTcmComponent,
"builtin.pe_cpu": PeCpuComponent,
"builtin.pe_scheduler": PeSchedulerComponent,
"builtin.pe_dma": PeDmaComponent,
"builtin.pe_gemm": PeGemmComponent,
"builtin.pe_math": PeMathComponent,
"builtin.pe_tcm": PeTcmComponent,
}
for impl, cls in expected.items():
node = Node(id=f"test.{impl}", kind=impl.replace("_v1", ""),
node = Node(id=f"test.{impl}", kind=impl.replace("", ""),
impl=impl, pos_mm=None, attrs={})
comp = ComponentRegistry.create(node)
assert isinstance(comp, cls), f"{impl} resolved to {type(comp)}, expected {cls}"
@@ -90,7 +90,7 @@ def test_pe_dma_dual_channel_concurrent():
"""
env = simpy.Environment()
node = Node(id="sip0.cube0.pe0.pe_dma", kind="pe_dma",
impl="pe_dma_v1", pos_mm=None,
impl="builtin.pe_dma", pos_mm=None,
attrs={"rd_engines": 1, "wr_engines": 1})
comp = PeDmaComponent(node)
@@ -151,7 +151,7 @@ def test_pe_dma_same_channel_serializes():
"""Two READ operations on the same PE_DMA must serialize (capacity=1)."""
env = simpy.Environment()
node = Node(id="sip0.cube0.pe0.pe_dma", kind="pe_dma",
impl="pe_dma_v1", pos_mm=None,
impl="builtin.pe_dma", pos_mm=None,
attrs={"rd_engines": 1, "wr_engines": 1})
comp = PeDmaComponent(node)
@@ -219,11 +219,11 @@ def test_pe_accel_shared_slot():
pe_prefix = "sip0.cube0.pe0"
gemm_node = Node(
id=f"{pe_prefix}.pe_gemm", kind="pe_gemm", impl="pe_gemm_v1",
id=f"{pe_prefix}.pe_gemm", kind="pe_gemm", impl="builtin.pe_gemm",
pos_mm=None, attrs={"overhead_ns": 10.0, "shared_resource": "accel_slot"},
)
math_node = Node(
id=f"{pe_prefix}.pe_math", kind="pe_math", impl="pe_math_v1",
id=f"{pe_prefix}.pe_math", kind="pe_math", impl="builtin.pe_math",
pos_mm=None, attrs={"overhead_ns": 10.0, "shared_resource": "accel_slot"},
)
gemm = PeGemmComponent(gemm_node, ctx)
@@ -302,7 +302,7 @@ def test_pe_gemm_handles_pe_internal_txn():
pe_prefix = "sip0.cube0.pe0"
gemm_node = Node(
id=f"{pe_prefix}.pe_gemm", kind="pe_gemm", impl="pe_gemm_v1",
id=f"{pe_prefix}.pe_gemm", kind="pe_gemm", impl="builtin.pe_gemm",
pos_mm=None, attrs={"overhead_ns": 5.0, "shared_resource": "accel_slot"},
)
gemm = PeGemmComponent(gemm_node, ctx)
@@ -343,7 +343,7 @@ def test_pe_math_handles_pe_internal_txn():
pe_prefix = "sip0.cube0.pe0"
math_node = Node(
id=f"{pe_prefix}.pe_math", kind="pe_math", impl="pe_math_v1",
id=f"{pe_prefix}.pe_math", kind="pe_math", impl="builtin.pe_math",
pos_mm=None, attrs={"overhead_ns": 3.0, "shared_resource": "accel_slot"},
)
math_comp = PeMathComponent(math_node, ctx)
tests/test_phase_a_components.py
+16 -16
View File
@@ -57,7 +57,7 @@ def _inject(store: simpy.Store, txn: Transaction):
def test_transit_component_run_overhead_ns():
"""TransitComponent.run() yields exactly overhead_ns."""
node = _node("forwarding_v1", {"overhead_ns": 7.5})
node = _node("builtin.forwarding", {"overhead_ns": 7.5})
comp = TransitComponent(node)
env = simpy.Environment()
@@ -71,7 +71,7 @@ def test_transit_component_run_overhead_ns():
def test_transit_component_run_zero_overhead_ns():
"""TransitComponent.run() with overhead_ns=0 completes immediately."""
node = _node("noc_v1", {"overhead_ns": 0.0})
node = _node("builtin.noc", {"overhead_ns": 0.0})
comp = TransitComponent(node)
env = simpy.Environment()
done = []
@@ -91,7 +91,7 @@ def test_transit_component_run_zero_overhead_ns():
def test_io_cpu_component_run_overhead_ns():
"""IoCpuComponent.run() yields exactly overhead_ns."""
node = _node("io_cpu_v1", {"overhead_ns": 10.0})
node = _node("builtin.io_cpu", {"overhead_ns": 10.0})
comp = IoCpuComponent(node)
env = simpy.Environment()
@@ -108,7 +108,7 @@ def test_io_cpu_component_run_overhead_ns():
def test_hbm_ctrl_terminal_succeeds_done():
"""HbmCtrlComponent is a terminal node: succeeds txn.done after run()."""
node = _node("hbm_ctrl_v1", {"overhead_ns": 0.0, "capacity": 1})
node = _node("builtin.hbm_ctrl", {"overhead_ns": 0.0, "capacity": 1})
comp = HbmCtrlComponent(node)
env = simpy.Environment()
done_event = env.event()
@@ -121,7 +121,7 @@ def test_hbm_ctrl_terminal_succeeds_done():
def test_hbm_ctrl_resource_serializes_requests():
"""HbmCtrlComponent with capacity=1 serializes concurrent requests."""
node = _node("hbm_ctrl_v1", {"overhead_ns": 5.0, "capacity": 1})
node = _node("builtin.hbm_ctrl", {"overhead_ns": 5.0, "capacity": 1})
comp = HbmCtrlComponent(node)
env = simpy.Environment()
in_store: simpy.Store = simpy.Store(env)
@@ -151,7 +151,7 @@ def test_hbm_ctrl_resource_serializes_requests():
def test_sram_terminal_succeeds_done():
"""SramComponent is a terminal node: succeeds txn.done after run()."""
node = _node("sram_v1", {"overhead_ns": 2.0})
node = _node("builtin.sram", {"overhead_ns": 2.0})
comp = SramComponent(node)
env = simpy.Environment()
done_event = env.event()
@@ -168,7 +168,7 @@ def test_sram_terminal_succeeds_done():
def test_m_cpu_forwards_when_not_terminal():
"""MCpuComponent forwards Transaction to next hop when not terminal."""
node = _node("m_cpu_v1", {"overhead_ns": 5.0})
node = _node("builtin.m_cpu", {"overhead_ns": 5.0})
comp = MCpuComponent(node)
env = simpy.Environment()
@@ -213,7 +213,7 @@ def test_m_cpu_forwards_when_not_terminal():
def test_m_cpu_terminal_no_ctx_completes():
"""MCpuComponent without ctx completes txn.done when it is the terminal hop."""
node = _node("m_cpu_v1", {"overhead_ns": 0.0})
node = _node("builtin.m_cpu", {"overhead_ns": 0.0})
comp = MCpuComponent(node, ctx=None)
env = simpy.Environment()
done_event = env.event()
@@ -228,14 +228,14 @@ def test_m_cpu_terminal_no_ctx_completes():
@pytest.mark.parametrize("impl,expected_cls", [
("forwarding_v1", TransitComponent),
("noc_v1", TransitComponent),
("ucie_v1", TransitComponent),
("pcie_ep_v1", PcieEpComponent),
("io_cpu_v1", IoCpuComponent),
("m_cpu_v1", MCpuComponent),
("hbm_ctrl_v1", HbmCtrlComponent),
("sram_v1", SramComponent),
("builtin.forwarding", TransitComponent),
("builtin.noc", TransitComponent),
("builtin.ucie", TransitComponent),
("builtin.pcie_ep", PcieEpComponent),
("builtin.io_cpu", IoCpuComponent),
("builtin.m_cpu", MCpuComponent),
("builtin.hbm_ctrl", HbmCtrlComponent),
("builtin.sram", SramComponent),
])
def test_registry_resolves_impl(impl, expected_cls):
"""ComponentRegistry.create() returns the correct concrete class for each impl."""