Rename impl names: add builtin. prefix for clear provenance

- components.yaml: all builtin impls use builtin.xxx naming
- topology.yaml: all impl references updated to builtin.xxx
- builder.py: hardcoded ucie impl → builtin.ucie
- Tests: all impl string references updated

Convention: builtin.<name> for built-in, custom.<name> for user-defined.
382 tests passing.

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

tests/test_phase_a_components.py

@@ -57,7 +57,7 @@ def _inject(store: simpy.Store, txn: Transaction):
 
 def test_transit_component_run_overhead_ns():
     """TransitComponent.run() yields exactly overhead_ns."""
-    node = _node("forwarding_v1", {"overhead_ns": 7.5})
+    node = _node("builtin.forwarding", {"overhead_ns": 7.5})
     comp = TransitComponent(node)
     env = simpy.Environment()
 
@@ -71,7 +71,7 @@ def test_transit_component_run_overhead_ns():
 
 def test_transit_component_run_zero_overhead_ns():
     """TransitComponent.run() with overhead_ns=0 completes immediately."""
-    node = _node("noc_v1", {"overhead_ns": 0.0})
+    node = _node("builtin.noc", {"overhead_ns": 0.0})
     comp = TransitComponent(node)
     env = simpy.Environment()
     done = []
@@ -91,7 +91,7 @@ def test_transit_component_run_zero_overhead_ns():
 
 def test_io_cpu_component_run_overhead_ns():
     """IoCpuComponent.run() yields exactly overhead_ns."""
-    node = _node("io_cpu_v1", {"overhead_ns": 10.0})
+    node = _node("builtin.io_cpu", {"overhead_ns": 10.0})
     comp = IoCpuComponent(node)
     env = simpy.Environment()
 
@@ -108,7 +108,7 @@ def test_io_cpu_component_run_overhead_ns():
 
 def test_hbm_ctrl_terminal_succeeds_done():
     """HbmCtrlComponent is a terminal node: succeeds txn.done after run()."""
-    node = _node("hbm_ctrl_v1", {"overhead_ns": 0.0, "capacity": 1})
+    node = _node("builtin.hbm_ctrl", {"overhead_ns": 0.0, "capacity": 1})
     comp = HbmCtrlComponent(node)
     env = simpy.Environment()
     done_event = env.event()
@@ -121,7 +121,7 @@ def test_hbm_ctrl_terminal_succeeds_done():
 
 def test_hbm_ctrl_resource_serializes_requests():
     """HbmCtrlComponent with capacity=1 serializes concurrent requests."""
-    node = _node("hbm_ctrl_v1", {"overhead_ns": 5.0, "capacity": 1})
+    node = _node("builtin.hbm_ctrl", {"overhead_ns": 5.0, "capacity": 1})
     comp = HbmCtrlComponent(node)
     env = simpy.Environment()
     in_store: simpy.Store = simpy.Store(env)
@@ -151,7 +151,7 @@ def test_hbm_ctrl_resource_serializes_requests():
 
 def test_sram_terminal_succeeds_done():
     """SramComponent is a terminal node: succeeds txn.done after run()."""
-    node = _node("sram_v1", {"overhead_ns": 2.0})
+    node = _node("builtin.sram", {"overhead_ns": 2.0})
     comp = SramComponent(node)
     env = simpy.Environment()
     done_event = env.event()
@@ -168,7 +168,7 @@ def test_sram_terminal_succeeds_done():
 
 def test_m_cpu_forwards_when_not_terminal():
     """MCpuComponent forwards Transaction to next hop when not terminal."""
-    node = _node("m_cpu_v1", {"overhead_ns": 5.0})
+    node = _node("builtin.m_cpu", {"overhead_ns": 5.0})
     comp = MCpuComponent(node)
     env = simpy.Environment()
 
@@ -213,7 +213,7 @@ def test_m_cpu_forwards_when_not_terminal():
 
 def test_m_cpu_terminal_no_ctx_completes():
     """MCpuComponent without ctx completes txn.done when it is the terminal hop."""
-    node = _node("m_cpu_v1", {"overhead_ns": 0.0})
+    node = _node("builtin.m_cpu", {"overhead_ns": 0.0})
     comp = MCpuComponent(node, ctx=None)
     env = simpy.Environment()
     done_event = env.event()
@@ -228,14 +228,14 @@ def test_m_cpu_terminal_no_ctx_completes():
 
 
 @pytest.mark.parametrize("impl,expected_cls", [
-    ("forwarding_v1", TransitComponent),
-    ("noc_v1",        TransitComponent),
-    ("ucie_v1",       TransitComponent),
-    ("pcie_ep_v1",    PcieEpComponent),
-    ("io_cpu_v1",     IoCpuComponent),
-    ("m_cpu_v1",      MCpuComponent),
-    ("hbm_ctrl_v1",   HbmCtrlComponent),
-    ("sram_v1",       SramComponent),
+    ("builtin.forwarding", TransitComponent),
+    ("builtin.noc",        TransitComponent),
+    ("builtin.ucie",       TransitComponent),
+    ("builtin.pcie_ep",    PcieEpComponent),
+    ("builtin.io_cpu",     IoCpuComponent),
+    ("builtin.m_cpu",      MCpuComponent),
+    ("builtin.hbm_ctrl",   HbmCtrlComponent),
+    ("builtin.sram",       SramComponent),
 ])
 def test_registry_resolves_impl(impl, expected_cls):
     """ComponentRegistry.create() returns the correct concrete class for each impl."""