Add PE-level IPCQ collective infra + unified ccl_allreduce bench (ADR-0023)
Major changes:
PE-level IPCQ infrastructure:
- New PE_IPCQ component: ring-buffer control plane with 4-direction
neighbor mapping, head/tail pointers, backpressure (poll/sleep).
- PE_DMA extended with vc_comm channel for IPCQ outbound/inbound DMA,
including in-flight data snapshot (D9) and op_log recording at
outbound time for Phase 2 replay correctness.
- IpcqDmaToken piggyback model: data + metadata travel together,
atomic visibility at receiver (invariant I6).
- Credit return fast path: bottleneck-BW latency, no fabric vc_comm.
Phase 2 data execution (ADR-0020 integration):
- op_log extended: DmaWriteCmd now captures src_space/src_addr for
Phase 2 dma_write copy; ipcq_copy ops recorded at outbound time.
- DataExecutor replays dma_write + ipcq_copy in t_start order.
- Engine._flush_data_phase: incremental cursor-based replay after
each engine.wait() so host reads see post-Phase-2 data.
- KernelRunner Phase 1 writes disabled when op_log is active to
prevent stale data from corrupting the MemoryStore snapshot.
TLContext / kernel API:
- tl.send(dir, src=TensorHandle), tl.recv(dir, shape, dtype),
tl.recv_async, tl.wait(RecvFuture), copy_to_dst mode.
- TensorHandle operator overloading (add/sub/mul/div) via thread-local
active TLContext → MathCmd dispatch through PE_MATH.
- PE-local scratch allocator for math output handles.
- tl.load returns space="hbm" handles for correct Phase 2 addressing.
- Additional math functions: maximum, minimum, fma, clamp, softmax, cdiv.
Unified ccl_allreduce bench (PyTorch-compat host code):
- Single benches/ccl_allreduce.py with run() + worker(rank, ws, torch)
split matching real PyTorch DDP worker pattern.
- torch.distributed facade: init_process_group, get_world_size,
get_rank, get_backend, all_reduce, barrier — only real PyTorch names.
- AhbmCCLBackend: eager install_ipcq at init, all_reduce dispatches
kernel via tensor shard metadata (n_elem from shards[0].nbytes).
- world_size derived from topology spec (sips × cubes × pes_per_cube)
with optional algorithm-level override in ccl.yaml.
Tensor API (PyTorch-compat surface):
- Tensor.numpy(): gather-aware (all shards via VA-based addressing).
- Tensor.copy_(source): scatter from host tensor into sharded target.
- RuntimeContext.from_numpy(arr): host-side staging tensor.
- Tensor.data property fixed to use numpy() (was shards[0]-only).
Algorithm modules moved to src/kernbench/ccl/algorithms/:
- ring_allreduce, mesh_allreduce, tree_allreduce, hello_send.
- Each module exports kernel_args(world_size, n_elem) helper.
- ccl.yaml module paths updated to kernbench.ccl.algorithms.*.
Dead code removed:
- 7 per-variant bench files (ccl_allreduce_{tcm,hbm,sram}, etc.).
- _run_ccl_bench greenlet-per-SIP scheduler.
- benches.loader.is_ccl_bench + run_rank detection.
- benches/ccl/ directory.
Tests:
- New test_ccl_allreduce_matrix.py: 7 parametrized cases
(ring×3 buffers, ring 8/16, mesh 4, tree 7).
- New test_runtime_api_tensor.py: copy_/numpy/from_numpy unit tests.
- Existing tests updated for new import paths + world_size_override.
Docs:
- Korean ccl-author-guide.md and ADR-0023 paths updated.
- New English versions: ccl-author-guide.en.md, ADR-0023.en.md.
502 tests pass.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
This commit is contained in:
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"""CCL all-reduce bench — single unified entry point.
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Driven entirely by ``ccl.yaml`` + ``topology.yaml``:
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- ``defaults.algorithm`` in ``ccl.yaml`` picks which kernel to run
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(``ring_allreduce_{tcm,hbm,sram}`` / ``mesh_allreduce_4`` /
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``tree_allreduce_7``).
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- ``world_size`` is derived from the algorithm entry's override or from
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the topology spec (``sips × cubes_per_sip × pes_per_cube``).
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- The host code uses only real PyTorch ``torch.distributed`` names:
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``init_process_group``, ``get_world_size``, ``get_rank``, ``all_reduce``.
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The bench is split into ``worker(rank, world_size, torch)`` — the
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per-rank business logic, designed to look like a real PyTorch DDP
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training worker so future model benches can reuse the same skeleton —
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and ``run(torch)`` — the kernbench-specific launcher that initializes
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the process group and invokes the worker.
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"""
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from __future__ import annotations
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import numpy as np
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from kernbench.ccl.install import load_ccl_config, resolve_algorithm_config
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from kernbench.policy.placement.dp import DPPolicy
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# Default per-rank tile size if ccl.yaml doesn't override it. Real
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# pytorch benches hardcode batch/feature dims similarly.
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DEFAULT_N_ELEM = 32
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def _derive_dp(spec: dict, world_size: int) -> DPPolicy:
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"""Pick a DPPolicy that fans the tensor across exactly ``world_size`` PEs.
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Mirrors what a real PyTorch DDP user does manually with
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``tensor.to(f"cuda:{rank}")``: the host code chooses the placement so
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that the collective sees the right number of participating ranks.
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"""
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sips = int(spec["system"]["sips"]["count"])
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cm = spec["sip"]["cube_mesh"]
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pl = spec["cube"]["pe_layout"]
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pes_per_cube = int(pl["pe_per_corner"]) * len(pl["corners"])
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cubes_per_sip = int(cm["w"]) * int(cm["h"])
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total = sips * cubes_per_sip * pes_per_cube
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if world_size == total:
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return DPPolicy(sip="column_wise", cube="column_wise", pe="column_wise")
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if world_size <= pes_per_cube:
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return DPPolicy(
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sip="replicate", cube="replicate", pe="column_wise",
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num_sips=1, num_cubes=1, num_pes=world_size,
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)
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if world_size <= cubes_per_sip * pes_per_cube:
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return DPPolicy(
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sip="replicate", cube="column_wise", pe="column_wise",
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num_sips=1, num_cubes=world_size // pes_per_cube,
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)
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return DPPolicy(sip="column_wise", cube="column_wise", pe="column_wise")
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def worker(rank: int, world_size: int, torch) -> None:
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"""Per-rank business logic. Mirrors a real PyTorch DDP worker.
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In real PyTorch DDP, this function runs in N separate processes,
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each with its own ``rank``. In kernbench (single-process multi-device)
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it is invoked once with ``rank=0`` on the single host driver; the
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actual per-PE parallelism is handled by ``torch.launch`` fanning out
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the kernel across all participating PEs via the tensor's DPPolicy.
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The ``rank`` parameter is therefore always 0 today, and is kept as
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an explicit argument for parity with real DDP workers (``if rank ==
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0`` logging guards, future multi-host extensions).
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"""
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cfg = resolve_algorithm_config(load_ccl_config())
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algo_name = cfg["algorithm"]
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n_elem = int(cfg.get("n_elem", DEFAULT_N_ELEM))
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# Pick a DP that produces exactly ``world_size`` shards on this topology.
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dp = _derive_dp(torch.spec, world_size)
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tensor = torch.zeros(
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(1, world_size * n_elem), dtype="f16", dp=dp, name="ccl_in",
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)
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# Initialize: CCL rank r's slice gets value (r + 1). Real PyTorch idiom:
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# target.copy_(torch.from_numpy(source))
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init = np.zeros((1, world_size * n_elem), dtype=np.float16)
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for r in range(world_size):
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init[0, r * n_elem : (r + 1) * n_elem] = float(r + 1)
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tensor.copy_(torch.from_numpy(init))
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# The main act: one all_reduce call — the backend installs IPCQ at
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# init_process_group time and here only dispatches the kernel.
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torch.distributed.all_reduce(tensor, op="sum")
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# Verify: each shard should hold sum(1..world_size) after all-reduce.
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result = tensor.numpy()
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expected = float(sum(range(1, world_size + 1)))
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all_ok = bool(np.allclose(result, expected, rtol=1e-1, atol=1e-1))
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# Print only on rank 0 — real PyTorch DDP idiom for single-source logs.
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if rank == 0:
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if all_ok:
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print(f" {algo_name} (ws={world_size}): {world_size} OK")
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else:
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flat = result.reshape(-1)
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n_fail = 0
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for r in range(world_size):
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slice_r = flat[r * n_elem : (r + 1) * n_elem]
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if not np.allclose(slice_r, expected, rtol=1e-1, atol=1e-1):
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n_fail += 1
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if n_fail <= 5:
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print(
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f" [FAIL] rank {r} "
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f"(ws={world_size}, algo={algo_name}): "
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f"got mean={float(slice_r.mean()):.3f}, "
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f"expected={expected:.3f}"
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)
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print(
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f" {algo_name} (ws={world_size}): "
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f"{world_size - n_fail} OK / {n_fail} FAIL"
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)
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def run(torch) -> None:
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"""CLI entry point: initialize the process group, invoke worker."""
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dist = torch.distributed
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dist.init_process_group(backend="ahbm")
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worker(
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rank=dist.get_rank(),
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world_size=dist.get_world_size(),
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torch=torch,
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)
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