Add PE-level IPCQ collective infra + unified ccl_allreduce bench (ADR-0023)
Major changes:
PE-level IPCQ infrastructure:
- New PE_IPCQ component: ring-buffer control plane with 4-direction
neighbor mapping, head/tail pointers, backpressure (poll/sleep).
- PE_DMA extended with vc_comm channel for IPCQ outbound/inbound DMA,
including in-flight data snapshot (D9) and op_log recording at
outbound time for Phase 2 replay correctness.
- IpcqDmaToken piggyback model: data + metadata travel together,
atomic visibility at receiver (invariant I6).
- Credit return fast path: bottleneck-BW latency, no fabric vc_comm.
Phase 2 data execution (ADR-0020 integration):
- op_log extended: DmaWriteCmd now captures src_space/src_addr for
Phase 2 dma_write copy; ipcq_copy ops recorded at outbound time.
- DataExecutor replays dma_write + ipcq_copy in t_start order.
- Engine._flush_data_phase: incremental cursor-based replay after
each engine.wait() so host reads see post-Phase-2 data.
- KernelRunner Phase 1 writes disabled when op_log is active to
prevent stale data from corrupting the MemoryStore snapshot.
TLContext / kernel API:
- tl.send(dir, src=TensorHandle), tl.recv(dir, shape, dtype),
tl.recv_async, tl.wait(RecvFuture), copy_to_dst mode.
- TensorHandle operator overloading (add/sub/mul/div) via thread-local
active TLContext → MathCmd dispatch through PE_MATH.
- PE-local scratch allocator for math output handles.
- tl.load returns space="hbm" handles for correct Phase 2 addressing.
- Additional math functions: maximum, minimum, fma, clamp, softmax, cdiv.
Unified ccl_allreduce bench (PyTorch-compat host code):
- Single benches/ccl_allreduce.py with run() + worker(rank, ws, torch)
split matching real PyTorch DDP worker pattern.
- torch.distributed facade: init_process_group, get_world_size,
get_rank, get_backend, all_reduce, barrier — only real PyTorch names.
- AhbmCCLBackend: eager install_ipcq at init, all_reduce dispatches
kernel via tensor shard metadata (n_elem from shards[0].nbytes).
- world_size derived from topology spec (sips × cubes × pes_per_cube)
with optional algorithm-level override in ccl.yaml.
Tensor API (PyTorch-compat surface):
- Tensor.numpy(): gather-aware (all shards via VA-based addressing).
- Tensor.copy_(source): scatter from host tensor into sharded target.
- RuntimeContext.from_numpy(arr): host-side staging tensor.
- Tensor.data property fixed to use numpy() (was shards[0]-only).
Algorithm modules moved to src/kernbench/ccl/algorithms/:
- ring_allreduce, mesh_allreduce, tree_allreduce, hello_send.
- Each module exports kernel_args(world_size, n_elem) helper.
- ccl.yaml module paths updated to kernbench.ccl.algorithms.*.
Dead code removed:
- 7 per-variant bench files (ccl_allreduce_{tcm,hbm,sram}, etc.).
- _run_ccl_bench greenlet-per-SIP scheduler.
- benches.loader.is_ccl_bench + run_rank detection.
- benches/ccl/ directory.
Tests:
- New test_ccl_allreduce_matrix.py: 7 parametrized cases
(ring×3 buffers, ring 8/16, mesh 4, tree 7).
- New test_runtime_api_tensor.py: copy_/numpy/from_numpy unit tests.
- Existing tests updated for new import paths + world_size_override.
Docs:
- Korean ccl-author-guide.md and ADR-0023 paths updated.
- New English versions: ccl-author-guide.en.md, ADR-0023.en.md.
502 tests pass.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
This commit is contained in:
@@ -106,18 +106,131 @@ class PeDmaComponent(PeEngineBase):
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pe_txn.done.succeed()
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def _worker(self, env: simpy.Environment) -> Generator:
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"""Handle TileToken (pipeline), PeInternalTxn (legacy), and Transaction (fabric)."""
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"""Handle TileToken (pipeline), PeInternalTxn (legacy), IpcqDmaToken,
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and Transaction (fabric)."""
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from kernbench.common.ipcq_types import IpcqDmaToken
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from kernbench.common.pe_commands import PeInternalTxn
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from kernbench.components.builtin.pe_types import TileToken
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while True:
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msg: Any = yield self._inbox.get()
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if isinstance(msg, TileToken):
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if isinstance(msg, IpcqDmaToken):
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# Outbound: IPCQ token from local PE_IPCQ → forward via fabric
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env.process(self._handle_ipcq_outbound(env, msg))
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elif isinstance(msg, TileToken):
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env.process(self._pipeline_process(env, msg))
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elif isinstance(msg, PeInternalTxn):
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env.process(self._handle_with_hooks(env, msg))
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else:
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env.process(self._forward_txn(env, msg))
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# Transaction (or unknown). May carry IpcqDmaToken inbound.
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req = getattr(msg, "request", None)
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if isinstance(req, IpcqDmaToken):
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env.process(self._handle_ipcq_inbound(env, msg))
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else:
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env.process(self._forward_txn(env, msg))
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# ── IPCQ outbound (PE_IPCQ → PE_DMA → fabric) ───────────────────
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def _handle_ipcq_outbound(self, env: simpy.Environment, token: Any) -> Generator:
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"""Forward IpcqDmaToken from local PE_IPCQ through the fabric to peer
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PE_DMA. ADR-0023 D8 (vc_comm channel)."""
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if self.ctx is None:
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return # nothing to do
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peer = token.dst_endpoint
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peer_pe_dma = f"sip{peer.sip}.cube{peer.cube}.pe{peer.pe}.pe_dma"
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# Snapshot the source data at send time (D9 in-flight semantics).
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# Without this, the receiver could read stale or future data if the
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# sender mutates src_addr between send issue and DMA arrival.
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store = getattr(self.ctx, "memory_store", None)
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if store is not None and token.data is None:
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try:
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snap = store.read(
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token.src_space, token.src_addr,
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shape=token.shape, dtype=token.dtype,
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)
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# Copy so later mutations to src_addr don't affect the snapshot.
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token.data = snap.copy() if hasattr(snap, "copy") else snap
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except Exception:
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token.data = None
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# Record the IPCQ copy in op_log at OUTBOUND time. ADR-0020 D6:
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# Phase 2 replays the copy in t_start order; using outbound time
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# (rather than inbound) ensures the copy executes before any later
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# local op at the sender that might overwrite token.src_addr (e.g.
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# a tl.store after a recv).
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if self._op_logger is not None:
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try:
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self._op_logger.record_copy(
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t_start=float(env.now), t_end=float(env.now),
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component_id=self.node.id,
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src_space=token.src_space, src_addr=token.src_addr,
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dst_space=peer.buffer_kind,
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dst_addr=token.dst_addr,
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shape=token.shape, dtype=token.dtype, nbytes=token.nbytes,
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)
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except Exception:
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pass
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try:
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path = self.ctx.router.find_path(self._pe_prefix, peer_pe_dma)
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except Exception:
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return
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drain_ns = self.ctx.compute_drain_ns(path, token.nbytes)
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sub_done = env.event()
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sub_txn = Transaction(
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request=token, path=path, step=0,
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nbytes=token.nbytes, done=sub_done, drain_ns=drain_ns,
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)
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if len(path) > 1:
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next_hop = path[1]
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if next_hop in self.out_ports:
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yield self.out_ports[next_hop].put(sub_txn.advance())
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else:
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return
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# Note: don't wait on sub_done here — fire-and-forget for vc_comm.
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# IPCQ slot bookkeeping (peer_head) was already updated by PE_IPCQ;
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# backpressure is via credit return, not via this DMA's completion.
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# ── IPCQ inbound (fabric → PE_DMA → MemoryStore + PE_IPCQ) ──────
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def _handle_ipcq_inbound(self, env: simpy.Environment, txn: Any) -> Generator:
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"""At destination PE_DMA: atomically write data and forward metadata.
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I6 (MUST): no SimPy yield between MemoryStore.write and the
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IpcqMetaArrival put into PE_IPCQ.
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"""
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from kernbench.common.ipcq_types import IpcqMetaArrival
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token = txn.request
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# ── ATOMIC: do not introduce yield between these two operations ──
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# 1. Move data via MemoryStore (single-hop DMA write).
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# Prefer the in-flight snapshot stashed by the sender PE_DMA;
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# fall back to a fresh read of src_addr if no snapshot is present
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# (e.g. control-only token).
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store = getattr(self.ctx, "memory_store", None) if self.ctx else None
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if store is not None:
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try:
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data = token.data
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if data is None:
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data = store.read(
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token.src_space, token.src_addr,
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shape=token.shape, dtype=token.dtype,
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)
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store.write(token.dst_endpoint.buffer_kind, token.dst_addr, data)
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except Exception:
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pass
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# 2. Forward IpcqMetaArrival to local PE_IPCQ
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ipcq_id = f"{self._pe_prefix}.pe_ipcq"
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if ipcq_id in self.out_ports:
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yield self.out_ports[ipcq_id].put(IpcqMetaArrival(token=token))
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# ─────────────────────────────────────────────────────────────────
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if not txn.done.triggered:
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txn.done.succeed()
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def _pipeline_process(self, env: simpy.Environment, token: Any) -> Generator:
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"""Pipeline mode: DMA read/write via fabric, then self-route."""
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