Add PE-level IPCQ collective infra + unified ccl_allreduce bench (ADR-0023)

Major changes:

PE-level IPCQ infrastructure:
- New PE_IPCQ component: ring-buffer control plane with 4-direction
  neighbor mapping, head/tail pointers, backpressure (poll/sleep).
- PE_DMA extended with vc_comm channel for IPCQ outbound/inbound DMA,
  including in-flight data snapshot (D9) and op_log recording at
  outbound time for Phase 2 replay correctness.
- IpcqDmaToken piggyback model: data + metadata travel together,
  atomic visibility at receiver (invariant I6).
- Credit return fast path: bottleneck-BW latency, no fabric vc_comm.

Phase 2 data execution (ADR-0020 integration):
- op_log extended: DmaWriteCmd now captures src_space/src_addr for
  Phase 2 dma_write copy; ipcq_copy ops recorded at outbound time.
- DataExecutor replays dma_write + ipcq_copy in t_start order.
- Engine._flush_data_phase: incremental cursor-based replay after
  each engine.wait() so host reads see post-Phase-2 data.
- KernelRunner Phase 1 writes disabled when op_log is active to
  prevent stale data from corrupting the MemoryStore snapshot.

TLContext / kernel API:
- tl.send(dir, src=TensorHandle), tl.recv(dir, shape, dtype),
  tl.recv_async, tl.wait(RecvFuture), copy_to_dst mode.
- TensorHandle operator overloading (add/sub/mul/div) via thread-local
  active TLContext → MathCmd dispatch through PE_MATH.
- PE-local scratch allocator for math output handles.
- tl.load returns space="hbm" handles for correct Phase 2 addressing.
- Additional math functions: maximum, minimum, fma, clamp, softmax, cdiv.

Unified ccl_allreduce bench (PyTorch-compat host code):
- Single benches/ccl_allreduce.py with run() + worker(rank, ws, torch)
  split matching real PyTorch DDP worker pattern.
- torch.distributed facade: init_process_group, get_world_size,
  get_rank, get_backend, all_reduce, barrier — only real PyTorch names.
- AhbmCCLBackend: eager install_ipcq at init, all_reduce dispatches
  kernel via tensor shard metadata (n_elem from shards[0].nbytes).
- world_size derived from topology spec (sips × cubes × pes_per_cube)
  with optional algorithm-level override in ccl.yaml.

Tensor API (PyTorch-compat surface):
- Tensor.numpy(): gather-aware (all shards via VA-based addressing).
- Tensor.copy_(source): scatter from host tensor into sharded target.
- RuntimeContext.from_numpy(arr): host-side staging tensor.
- Tensor.data property fixed to use numpy() (was shards[0]-only).

Algorithm modules moved to src/kernbench/ccl/algorithms/:
- ring_allreduce, mesh_allreduce, tree_allreduce, hello_send.
- Each module exports kernel_args(world_size, n_elem) helper.
- ccl.yaml module paths updated to kernbench.ccl.algorithms.*.

Dead code removed:
- 7 per-variant bench files (ccl_allreduce_{tcm,hbm,sram}, etc.).
- _run_ccl_bench greenlet-per-SIP scheduler.
- benches.loader.is_ccl_bench + run_rank detection.
- benches/ccl/ directory.

Tests:
- New test_ccl_allreduce_matrix.py: 7 parametrized cases
  (ring×3 buffers, ring 8/16, mesh 4, tree 7).
- New test_runtime_api_tensor.py: copy_/numpy/from_numpy unit tests.
- Existing tests updated for new import paths + world_size_override.

Docs:
- Korean ccl-author-guide.md and ADR-0023 paths updated.
- New English versions: ccl-author-guide.en.md, ADR-0023.en.md.

502 tests pass.

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

tests/test_data_executor.py

@@ -58,6 +58,69 @@ def test_math_exp():
     assert np.allclose(result, np.exp(x))
 
 
+def test_math_extra_ops():
+    """Phase 2 replay of tl.maximum/minimum/fma/clamp/softmax."""
+    store = MemoryStore()
+    a = np.array([1.0, 5.0, 3.0], dtype=np.float32)
+    b = np.array([4.0, 2.0, 6.0], dtype=np.float32)
+    c = np.array([0.5, 0.5, 0.5], dtype=np.float32)
+    store.write("tcm", 0x0, a)
+    store.write("tcm", 0x100, b)
+    store.write("tcm", 0x200, c)
+
+    def _math(name, op, dst, inputs, axis=None):
+        return OpRecord(
+            t_start=float(dst), t_end=float(dst) + 1.0,
+            component_id="pe_math", op_kind="math", op_name=name,
+            params={
+                "op": op,
+                "input_addrs": [a for a, _ in inputs],
+                "input_shapes": [s for _, s in inputs],
+                "input_spaces": ["tcm"] * len(inputs),
+                "input_dtypes": ["f32"] * len(inputs),
+                "dst_addr": dst, "dst_space": "tcm",
+                "shape_out": (3,), "dtype": "f32", "axis": axis,
+            },
+        )
+
+    ops = [
+        _math("maximum", "maximum", 0x300, [(0x0, (3,)), (0x100, (3,))]),
+        _math("minimum", "minimum", 0x400, [(0x0, (3,)), (0x100, (3,))]),
+        _math("fma",     "fma",     0x500, [(0x0, (3,)), (0x100, (3,)), (0x200, (3,))]),
+        _math("clamp",   "clamp",   0x600, [(0x0, (3,)), (0x200, (3,)), (0x100, (3,))]),
+    ]
+    DataExecutor(ops, store).run()
+
+    assert np.array_equal(store.read("tcm", 0x300), np.maximum(a, b))
+    assert np.array_equal(store.read("tcm", 0x400), np.minimum(a, b))
+    assert np.array_equal(store.read("tcm", 0x500), a * b + c)
+    assert np.array_equal(
+        store.read("tcm", 0x600), np.minimum(np.maximum(a, c), b)
+    )
+
+
+def test_math_softmax():
+    store = MemoryStore()
+    x = np.array([[1.0, 2.0, 3.0], [10.0, 20.0, 30.0]], dtype=np.float32)
+    store.write("tcm", 0x0, x)
+
+    op = OpRecord(
+        t_start=0.0, t_end=1.0,
+        component_id="pe_math", op_kind="math", op_name="softmax",
+        params={
+            "op": "softmax",
+            "input_addrs": [0x0], "input_shapes": [(2, 3)],
+            "input_spaces": ["tcm"], "input_dtypes": ["f32"],
+            "dst_addr": 0x100, "dst_space": "tcm",
+            "shape_out": (2, 3), "dtype": "f32", "axis": -1,
+        },
+    )
+    DataExecutor([op], store).run()
+    expected = np.exp(x - x.max(axis=-1, keepdims=True))
+    expected /= expected.sum(axis=-1, keepdims=True)
+    assert np.allclose(store.read("tcm", 0x100), expected)
+
+
 def test_math_add():
     store = MemoryStore()
     a = np.array([1.0, 2.0], dtype=np.float32)