ywkang
357cab525b
DPPolicy no longer carries a cross-SIP axis. SIP-level placement is solely controlled by torch.ahbm.set_device(rank) (ADR-0024); DPPolicy itself describes only the cube × PE layout within one SIP. ShardSpec switches to structural (sip, cube, pe) coordinates; the flat pe_index field/property is fully removed — silent drift between global-flat and SIP-local interpretations was a foot-gun flagged by ADR-0024 D11. Breaking API (explicit TypeError / AttributeError): - DPPolicy(sip=...) / DPPolicy(num_sips=...) -> TypeError - ShardSpec.pe_index -> AttributeError - ShardSpec(pe_index=...) -> TypeError - resolve_dp_policy now takes target_sip= (required), no num_sips. Downstream migration: - PE allocator dict keyed by (sip, cube, pe) tuples, in both _ensure_allocators and _free_tensor. deploy_tensor uses tuple lookup. - _create_tensor passes target_sip=current_sip; post-hoc pe_index shifting removed entirely. - launch._compute_local_shape drops the dp.sip branch. - Internal resolvers (column_wise / row_wise / replicate / tiled_*) return _LocalPeShard (cube-local identifier) instead of ShardSpec — resolve_dp_policy lifts them to full structural coords. Tests: - New tests/test_adr0026_dppolicy_intra_device.py (12 tests) pins the contract end-to-end. - test_sip_parallel.py rewritten: SIP composition now modeled as two resolve_dp_policy(target_sip=...) calls (ADR-0024 launcher style). - Call-site migration: test_tensor, test_va_integration, test_va_offset, test_runtime_api_tensor, test_tl_recv_async, test_ccl_* and benches gemm_single_pe, gpt3_qkv, va_offset_verify, ccl_allreduce (legacy branch) all use intra-device DPPolicy and structural ShardSpec. Result: 523 passed, 1 strict xfail (ring_default_ws — unchanged ADR-0024 Phase B blocker; architectural fix deferred to ADR-0027). Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
43 lines
1.6 KiB
Python
43 lines
1.6 KiB
Python
"""VA offset verification benchmark.
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Verifies that Triton-style base_ptr + pid * stride addressing works correctly
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with intra-SIP TP sharding (cube/pe column_wise). Each PE loads its own
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block from a sharded tensor and stores it back.
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The kernel uses standard Triton patterns:
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- tl.program_id(0) for PE index within cube
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- tl.num_programs(0) for PE count within cube
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- Shape args are automatically localized by launch()
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"""
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from kernbench.policy.placement.dp import DPPolicy
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M, K = 128, 256
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DTYPE = "f16"
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def _copy_kernel(src_ptr, dst_ptr, M, K, tl, DTYPE="f16"):
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"""Standard Triton copy kernel. M and K are cube-local (set by launch)."""
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pid = tl.program_id(0)
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num_pe = tl.num_programs(0)
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cols_per_pe = K // num_pe
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elem_bytes = 2 # f16
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offset = pid * M * cols_per_pe * elem_bytes
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data = tl.load(src_ptr + offset, shape=(M, cols_per_pe), dtype=DTYPE)
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tl.store(dst_ptr + offset, data)
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def run(torch):
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"""Run the VA offset verification benchmark with full TP sharding."""
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dp = DPPolicy(cube="column_wise", pe="column_wise")
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src = torch.zeros((M, K), dtype=DTYPE, dp=dp, name="src")
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dst = torch.empty((M, K), dtype=DTYPE, dp=dp, name="dst")
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# launch() automatically converts M, K to cube-local values
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torch.launch("va_offset_copy", _copy_kernel, src, dst, M, K)
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# Sanity check: kernel completed with non-zero latency
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kernel_traces = [t for t in torch._traces if t["phase"] == "kernel"]
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assert len(kernel_traces) > 0, "No kernel traces recorded"
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for kt in kernel_traces:
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assert kt["total_ns"] > 0, f"Kernel latency is zero for {kt}"
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