ywkang
1d95df4bee
- Move builtin_legacy/ → legacy/builtin/ (cleaner structure) - Move pe_accel_legacy/ → legacy/pe_accel/ - Remove custom/pe_accel/ (replaced by new builtin) - Remove pe_scheduler_v2 from components.yaml - Switch topology.yaml to pe_scheduler_v1 (new builtin) - Fix PE_DMA self-routing: handle consecutive DMA_READ stages (same component consecutive stages processed in-place, not via port) 382 tests passing. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
28 lines
838 B
Python
28 lines
838 B
Python
from __future__ import annotations
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from collections.abc import Generator
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from typing import TYPE_CHECKING
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import simpy
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from kernbench.components.base import ComponentBase
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if TYPE_CHECKING:
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from kernbench.components.context import ComponentContext
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from kernbench.topology.types import Node
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class TransitComponent(ComponentBase):
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"""Transit component for NOC, UCIe, XBAR nodes.
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Applies overhead_ns processing delay (from node.attrs) then forwards the
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Transaction to the next hop via inherited _forward_txn().
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"""
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def __init__(self, node: Node, ctx: ComponentContext | None = None) -> None:
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super().__init__(node, ctx)
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def run(self, env: simpy.Environment, nbytes: int) -> Generator:
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overhead_ns = float(self.node.attrs.get("overhead_ns", 0.0))
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yield env.timeout(overhead_ns)
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