ywkang e94f1de078 Cube-view SVG: detailed topology validation rendering ...

- Dedicated cube_view renderer showing 6×6 router grid with attachments
- PE blocks drawn next to their router (above/below)
- HBM pseudo channel port bar (64 ports, color-coded by PE owner)
- Per-PE BW annotations on HBM links
- Router color-coded by type (PE/M_CPU/SRAM/UCIe/relay)
- Title shows mode, channel count, per-PE and total BW
- Legend for all component types

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

2026-04-04 22:03:38 -07:00

..

custom

Add SIP-level tensor parallelism, component registry YAML, VA offset verification

2026-03-26 01:13:17 -07:00

test_bw_occupancy.py

Replace xbar/bridge/single-NOC with explicit router mesh (ADR-0019)

2026-04-04 17:51:28 -07:00

test_cli.py

Fix cross-SIP PE_TCM access by scoping deploy to target_device SIP

2026-04-04 18:03:11 -07:00

test_component_registry.py

Replace xbar/bridge/single-NOC with explicit router mesh (ADR-0019)

2026-04-04 17:51:28 -07:00

test_engine.py

Add probe CLI improvements, D2H read, UCIe/HBM tuning, BW sweep

2026-03-19 01:16:18 -07:00

test_iochiplet_noc_d2h.py

Add probe CLI improvements, D2H read, UCIe/HBM tuning, BW sweep

2026-03-19 01:16:18 -07:00

test_mmu_component.py

Add SIP-level tensor parallelism, component registry YAML, VA offset verification

2026-03-26 01:13:17 -07:00

test_mmu_fabric.py

Wire PE_MMU to router mesh for MmuMapMsg delivery

2026-04-04 18:10:42 -07:00

test_noc_mesh.py

Replace xbar/bridge/single-NOC with explicit router mesh (ADR-0019)

2026-04-04 17:51:28 -07:00

test_pe_components.py

Fix cross-SIP PE_TCM access by scoping deploy to target_device SIP

2026-04-04 18:03:11 -07:00

test_pe_mmu.py

Add virtual memory support: PE_MMU, VA allocator, fabric MmuMapMsg

2026-03-26 00:01:47 -07:00

test_phase_a_components.py

Add SIP-level tensor parallelism, component registry YAML, VA offset verification

2026-03-26 01:13:17 -07:00

test_phyaddr.py

commit - release 1

2026-03-18 11:47:48 -07:00

test_probe.py

Replace xbar/bridge/single-NOC with explicit router mesh (ADR-0019)

2026-04-04 17:51:28 -07:00

test_routing.py

Replace xbar/bridge/single-NOC with explicit router mesh (ADR-0019)

2026-04-04 17:51:28 -07:00

test_sip_parallel.py

Add SIP-level tensor parallelism, component registry YAML, VA offset verification

2026-03-26 01:13:17 -07:00

test_tensor_free.py

Wire PE_MMU to router mesh for MmuMapMsg delivery

2026-04-04 18:10:42 -07:00

test_tensor.py

commit - release 1

2026-03-18 11:47:48 -07:00

test_topology_compile.py

Show individual routers in cube_view SVG, fix row Y overlap

2026-04-04 18:22:38 -07:00

test_topology_load.py

Add virtual memory support: PE_MMU, VA allocator, fabric MmuMapMsg

2026-03-26 00:01:47 -07:00

test_topology_visualize.py

Cube-view SVG: detailed topology validation rendering

2026-04-04 22:03:38 -07:00

test_triton_emu.py

Add virtual memory support: PE_MMU, VA allocator, fabric MmuMapMsg

2026-03-26 00:01:47 -07:00

test_va_allocator.py

Add virtual memory support: PE_MMU, VA allocator, fabric MmuMapMsg

2026-03-26 00:01:47 -07:00

test_va_integration.py

Add SIP-level tensor parallelism, component registry YAML, VA offset verification

2026-03-26 01:13:17 -07:00

test_va_offset.py

Fix cross-SIP PE_TCM access by scoping deploy to target_device SIP

2026-04-04 18:03:11 -07:00