9e1242039b
End-to-end wires C=8 P=8 d_head=128 prefill with snake-ring inter-CUBE SFR, intra-CUBE PE-SP (all 64 ranks active), and the milestone bench panel. Decode kernel gains lrab-adapted center-root reduce for the 2×4 sub-mesh per ADR-0060 §4.2. Increment 1 — SFR multi-row snake src/kernbench/ccl/sfr_config.py: configure_sfr_intercube_ring gains submesh_shape / submesh_origin kwargs; installs a Hamiltonian snake ring through a rectangular sub-mesh (every hop is 1-hop physical neighbour). Backward-compat: 1D-row behaviour preserved when submesh_shape is None. tests/test_intercube_snake_ring.py (12 tests) Increment 2 — Decode lrab-adapted center-root reduce src/kernbench/benches/_gqa_attention_decode_long.py: new sub_w param (default 0 = existing 1D-chain). sub_w >= 2 selects the ADR-0060 §4.2 prescribed lrab-adapted Phase 1+2 reduce (bidirectional row + bidirectional col converge to the center cube), with log-sum-exp _merge_running replacing the plain + of lrab. tests/attention/test_gqa_decode_long_2d_reduce.py (4 tests) Increment 3 — Prefill kernel at C=8 (no production change) Verified by inspection that the existing prefill_long kernel + Increment 1's snake SFR already work at C=8 without any kernel edit. The kernel speaks logical W/E; the snake routes it. tests/attention/test_gqa_prefill_long_c8_snake.py (3 tests) Increment 4 — Intra-CUBE PE-SP in prefill (all 64 ranks) src/kernbench/benches/_gqa_attention_prefill_long.py: new P param (default 1 = existing PE-0-only). P > 1 splits T_q query-axis-wise across the P PEs of each CUBE; output rows are disjoint per PE so no intra-CUBE reduce is needed; each PE drives its own same-lane ring (P parallel rings). tests/attention/test_gqa_prefill_long_pe_sp.py (5 tests) Increment 5 — LLaMA-scale milestone bench panel src/kernbench/benches/milestone_gqa_headline.py: new panel single_kv_group_prefill_gqa_c8_p8 (C=8, P=8, T_q=S_kv=32K, d_head=128). _run_prefill_panel extended with P/T_q/d_head defaults; routes snake SFR when C > mesh_w. tests/attention/test_milestone_gqa_single_kv_group_prefill_panel.py (3 tests) Total: 4 production files modified, 5 new test files, 27 new tests. Followed the Phase 1/2 protocol per CLAUDE.md throughout. Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
234 lines
8.4 KiB
Python
234 lines
8.4 KiB
Python
"""Tests for intra-CUBE PE-SP in prefill_long (query-axis split).
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ADR-0060 §5.5 last bullet + §B-item-3: split the head's query rows
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``[T_q, d_head]`` across the ``P`` PEs of each CUBE so all P PEs work
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in parallel. Output rows are disjoint across PEs ⇒ no intra-CUBE
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reduce needed.
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Same-lane SFR wiring: PE ``i`` in CUBE A has its own E/W ring link to
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PE ``i`` in CUBE B (the snake's prev/next). All P PEs of a CUBE see
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the same K, V (HBM-resident, ``pe="replicate"``) ⇒ P parallel rings
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run in lockstep, each PE rotating its own K/V copies via its own IPCQ
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channels.
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Activation contract:
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- ``P == 1`` (default; omitted from launch args) → existing
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PE-0-only behavior. Byte-for-byte unchanged.
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- ``P > 1`` → all P PEs active; each handles ``T_q // P`` query
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rows. Requires ``T_q % P == 0`` (degenerate T_q < P is rejected
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— caller must use ``P=1`` for that workload, ADR-0060 §B-item-3).
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Phase 1: tests only — production code lands in Phase 2.
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T1, T2, T3, T5 fail today (TypeError: kernel signature has no P).
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T4 passes today as the backward-compat anchor.
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"""
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from __future__ import annotations
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from pathlib import Path
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import pytest
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from kernbench.benches._gqa_attention_prefill_long import gqa_attention_prefill_long_kernel # noqa: F401
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from kernbench.ccl.install import load_ccl_config, resolve_algorithm_config
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from kernbench.ccl.sfr_config import configure_sfr_intercube_ring
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from kernbench.policy.placement.dp import DPPolicy
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from kernbench.runtime_api.bench_runner import run_bench
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from kernbench.runtime_api.types import resolve_device
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from kernbench.sim_engine.engine import GraphEngine
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from kernbench.topology.builder import resolve_topology
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TOPOLOGY_DEFAULT = Path(__file__).resolve().parents[2] / "topology.yaml"
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D_HEAD = 64
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DTYPE = "f16"
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def _ccl_cfg():
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return resolve_algorithm_config(
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load_ccl_config(), name="lrab_hierarchical_allreduce",
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)
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def _engine_factory(t, d):
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return GraphEngine(getattr(t, "topology_obj", t), enable_data=True)
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def _count(op_log, name: str) -> int:
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return sum(1 for r in op_log if r.op_name == name)
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def _run_prefill_pe_sp(
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*, T_q: int, S_kv: int, C: int, P: int | None,
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snake: bool,
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):
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"""Drive a prefill_long launch with optional intra-CUBE PE-SP.
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``P=None`` → omit P from the launch args (exercises the kernel's
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default behaviour).
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``snake=True`` → install the 2×4 snake ring SFR (Increment 1);
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else install the 1D-row ring at ``ring_size=C``.
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"""
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topo = resolve_topology(str(TOPOLOGY_DEFAULT))
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def _bench_fn(ctx):
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if snake:
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configure_sfr_intercube_ring(
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ctx.engine, ctx.spec, _ccl_cfg(),
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submesh_shape=(2, 4),
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)
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else:
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configure_sfr_intercube_ring(
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ctx.engine, ctx.spec, _ccl_cfg(),
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ring_size=C,
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)
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num_pes = P if (P is not None and P > 1) else 1
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# When PE-SP is active, Q and O are split row-wise across PEs;
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# K, V remain replicated within a CUBE.
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q_pe = "row_wise" if num_pes > 1 else "replicate"
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o_pe = "row_wise" if num_pes > 1 else "replicate"
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dp_q = DPPolicy(cube="replicate", pe=q_pe,
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num_cubes=C, num_pes=num_pes)
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dp_kv = DPPolicy(cube="row_wise" if C > 1 else "replicate",
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pe="replicate", num_cubes=C, num_pes=num_pes)
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dp_o = DPPolicy(cube="row_wise" if C > 1 else "replicate",
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pe=o_pe, num_cubes=C, num_pes=num_pes)
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suffix = f"c{C}_p{P}_t{T_q}_s{S_kv}"
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q = ctx.zeros((T_q, D_HEAD), dtype=DTYPE, dp=dp_q,
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name=f"q_pe_sp_{suffix}")
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k = ctx.zeros((S_kv, D_HEAD), dtype=DTYPE, dp=dp_kv,
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name=f"k_pe_sp_{suffix}")
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v = ctx.zeros((S_kv, D_HEAD), dtype=DTYPE, dp=dp_kv,
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name=f"v_pe_sp_{suffix}")
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o = ctx.empty((T_q * C, D_HEAD), dtype=DTYPE, dp=dp_o,
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name=f"o_pe_sp_{suffix}")
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launch_args = [q, k, v, o, T_q, S_kv, D_HEAD, C]
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if P is not None:
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launch_args.append(P)
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ctx.launch(
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f"gqa_prefill_long_pe_sp_{suffix}",
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gqa_attention_prefill_long_kernel,
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*launch_args,
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_auto_dim_remap=False,
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)
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return run_bench(
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topology=topo, bench_fn=_bench_fn,
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device=resolve_device(None),
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engine_factory=_engine_factory,
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)
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# ── T1: C=8 P=8 completes end-to-end ─────────────────────────────────
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def test_prefill_c8_p8_pe_sp_completes():
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"""ADR-0060 §5.5 + §B-item-3 design target: 64 ranks active
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(8 CUBEs × 8 PEs), query-axis split across PEs, snake-mapped
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Ring KV. Guards no scratch overflow, no deadlock across the
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P parallel same-lane rings.
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"""
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result = _run_prefill_pe_sp(
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T_q=8, S_kv=8192, C=8, P=8, snake=True,
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)
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assert result.completion.ok, (
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f"prefill at C=8, P=8 (PE-SP) must complete; "
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f"got {result.completion}"
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)
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# ── T2: 64 dma_writes (one per PE, disjoint query rows) ──────────────
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def test_prefill_c8_p8_pe_sp_64_dma_writes():
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"""With query-axis split, each PE owns ``T_q/P = 1`` query row
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and stores its own ``(1, d_head)`` slice. Across all 64 ranks
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(8 CUBEs × 8 PEs), ``dma_write_count == 64``.
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This is the structural signal that PE-SP is actually wired:
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PE-0-only would give 8 dma_writes (one per CUBE).
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"""
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result = _run_prefill_pe_sp(
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T_q=8, S_kv=8192, C=8, P=8, snake=True,
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)
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assert result.completion.ok
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n_writes = _count(result.engine.op_log, "dma_write")
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assert n_writes == 64, (
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f"PE-SP at C=8, P=8: expected 64 dma_writes "
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f"(8 cubes × 8 PEs, each writes its T_q/P=1 query row); "
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f"got {n_writes}"
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)
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# ── T3: P parallel rings — ipcq_copy scales by P ─────────────────────
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def test_prefill_c8_p8_pe_sp_ring_ipcq_count():
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"""Per-PE same-lane rings: each PE runs its own ring traffic via
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its own IPCQ channels. Total inter-CUBE ipcq_copy:
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``(C-1) · n_tiles · 2 · C · P`` (= existing C=8 formula × P).
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Configuration: T_q=8, S_kv=8192, C=8 → S_local=1024, n_tiles=1
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(TILE_S_KV=1024). Expected = ``7·1·2·8·8`` = **896**.
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"""
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C = 8
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P = 8
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n_tiles = 1
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result = _run_prefill_pe_sp(
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T_q=8, S_kv=8192, C=C, P=P, snake=True,
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)
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assert result.completion.ok
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n_copy = _count(result.engine.op_log, "ipcq_copy")
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expected = (C - 1) * n_tiles * 2 * C * P
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assert n_copy == expected, (
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f"PE-SP parallel rings at C=8, P=8: expected {expected} "
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f"ipcq_copy ((C-1)·n_tiles·2·C·P = "
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f"{C - 1}·{n_tiles}·2·{C}·{P}); got {n_copy}"
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)
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# ── T4: backward-compat — P omitted → existing PE-0-only behaviour ───
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def test_prefill_p_default_1_backward_compat():
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"""When ``P`` is omitted from the launch args, the kernel must
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behave identically to today: only PE 0 of each CUBE participates;
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one head per CUBE; one dma_write per CUBE.
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At C=4 this gives 4 dma_writes (matches the existing
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``test_prefill_long_tile_ring_dma_write_count``). Phase 2 must
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not regress this path.
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Passes today AND after Phase 2.
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"""
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C = 4
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result = _run_prefill_pe_sp(
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T_q=4, S_kv=8192, C=C, P=None, snake=False,
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)
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assert result.completion.ok, (
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f"prefill at C=4 with default P (PE-0-only) must complete; "
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f"got {result.completion}"
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)
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n_writes = _count(result.engine.op_log, "dma_write")
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assert n_writes == C, (
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f"default P=1 (PE-0-only): expected {C} dma_writes "
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f"(one per CUBE); got {n_writes}"
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)
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# ── T5: validation — T_q must be divisible by P when P > 1 ───────────
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def test_prefill_pe_sp_rejects_non_divisible_t_q():
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"""ADR-0060 §B-item-3 fallback (KV-block split + intra-CUBE
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reduce for T_q < P) is deferred. Callers must request ``P=1`` for
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workloads where T_q < P or T_q % P != 0.
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C=4, P=8, T_q=4 violates ``T_q % P == 0`` (and also T_q < P).
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The kernel must raise ValueError with a clear error message
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rather than silently producing wrong results.
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"""
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with pytest.raises((ValueError, AssertionError), match=r"T_q"):
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_run_prefill_pe_sp(
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T_q=4, S_kv=8192, C=4, P=8, snake=False,
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)
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