Files
kernbench2/docs/diagrams/allreduce_latency_plots/buffer_kind_sweep.csv
T
mukesh 84a1325e5c ADR-0023 D9.7: IPCQ slot-memory latency model (TCM/SRAM/HBM)
Charge per-tier bandwidth + setup overhead at IPCQ slot WRITE
(receiver inbound DMA, in pe_dma._handle_ipcq_inbound) and slot
READ (recv consume, in pe_ipcq._handle_recv). Tier table
(common/ipcq_types.py):
  tcm  : 512 GB/s, 0 ns
  sram : 128 GB/s, 2 ns
  hbm  :  32 GB/s, 6 ns

Before this change, slot read/write was free regardless of
buffer_kind, making memory-tier choice invisible in simulated
latency. After the change, swapping buffer_kind in ccl.yaml
produces measurable per-tier separation in allreduce latency.

Tests:
  test_ipcq_buffer_kind_latency.py — three micro-tests asserting
    tcm < sram < hbm ordering, payload-scaling, and that
    buffer_kind sensitivity grows with payload (credit-only path
    stays fabric-bound).
  test_allreduce_buffer_kind_sweep.py — 12-config parametrized
    sweep emitting buffer_kind_sweep.png (3 lines, torus_2d).

conftest sessionfinish hook generalised to dispatch multiple
sweep aggregators (allreduce + buffer-kind).

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
2026-04-27 21:28:34 -07:00

592 B

1buffer_kindsip_topologyn_sipsn_elembytes_per_pelatency_ns
2hbmtorus_2d61282562002.0399999999827
3hbmtorus_2d6102420483541.0399999999827
4hbmtorus_2d681921638415889.03999999999
5hbmtorus_2d6327686553658225.03999999998
6sramtorus_2d61282561762.0399999999827
7sramtorus_2d6102420482293.0399999999827
8sramtorus_2d68192163846577.039999999986
9sramtorus_2d6327686553621265.03999999992
10tcmtorus_2d61282561678.0399999999827
11tcmtorus_2d6102420481957.0399999999827
12tcmtorus_2d68192163844225.039999999986
13tcmtorus_2d6327686553612001.03999999992