ywkang
998cc85762
Major changes:
PE-level IPCQ infrastructure:
- New PE_IPCQ component: ring-buffer control plane with 4-direction
neighbor mapping, head/tail pointers, backpressure (poll/sleep).
- PE_DMA extended with vc_comm channel for IPCQ outbound/inbound DMA,
including in-flight data snapshot (D9) and op_log recording at
outbound time for Phase 2 replay correctness.
- IpcqDmaToken piggyback model: data + metadata travel together,
atomic visibility at receiver (invariant I6).
- Credit return fast path: bottleneck-BW latency, no fabric vc_comm.
Phase 2 data execution (ADR-0020 integration):
- op_log extended: DmaWriteCmd now captures src_space/src_addr for
Phase 2 dma_write copy; ipcq_copy ops recorded at outbound time.
- DataExecutor replays dma_write + ipcq_copy in t_start order.
- Engine._flush_data_phase: incremental cursor-based replay after
each engine.wait() so host reads see post-Phase-2 data.
- KernelRunner Phase 1 writes disabled when op_log is active to
prevent stale data from corrupting the MemoryStore snapshot.
TLContext / kernel API:
- tl.send(dir, src=TensorHandle), tl.recv(dir, shape, dtype),
tl.recv_async, tl.wait(RecvFuture), copy_to_dst mode.
- TensorHandle operator overloading (add/sub/mul/div) via thread-local
active TLContext → MathCmd dispatch through PE_MATH.
- PE-local scratch allocator for math output handles.
- tl.load returns space="hbm" handles for correct Phase 2 addressing.
- Additional math functions: maximum, minimum, fma, clamp, softmax, cdiv.
Unified ccl_allreduce bench (PyTorch-compat host code):
- Single benches/ccl_allreduce.py with run() + worker(rank, ws, torch)
split matching real PyTorch DDP worker pattern.
- torch.distributed facade: init_process_group, get_world_size,
get_rank, get_backend, all_reduce, barrier — only real PyTorch names.
- AhbmCCLBackend: eager install_ipcq at init, all_reduce dispatches
kernel via tensor shard metadata (n_elem from shards[0].nbytes).
- world_size derived from topology spec (sips × cubes × pes_per_cube)
with optional algorithm-level override in ccl.yaml.
Tensor API (PyTorch-compat surface):
- Tensor.numpy(): gather-aware (all shards via VA-based addressing).
- Tensor.copy_(source): scatter from host tensor into sharded target.
- RuntimeContext.from_numpy(arr): host-side staging tensor.
- Tensor.data property fixed to use numpy() (was shards[0]-only).
Algorithm modules moved to src/kernbench/ccl/algorithms/:
- ring_allreduce, mesh_allreduce, tree_allreduce, hello_send.
- Each module exports kernel_args(world_size, n_elem) helper.
- ccl.yaml module paths updated to kernbench.ccl.algorithms.*.
Dead code removed:
- 7 per-variant bench files (ccl_allreduce_{tcm,hbm,sram}, etc.).
- _run_ccl_bench greenlet-per-SIP scheduler.
- benches.loader.is_ccl_bench + run_rank detection.
- benches/ccl/ directory.
Tests:
- New test_ccl_allreduce_matrix.py: 7 parametrized cases
(ring×3 buffers, ring 8/16, mesh 4, tree 7).
- New test_runtime_api_tensor.py: copy_/numpy/from_numpy unit tests.
- Existing tests updated for new import paths + world_size_override.
Docs:
- Korean ccl-author-guide.md and ADR-0023 paths updated.
- New English versions: ccl-author-guide.en.md, ADR-0023.en.md.
502 tests pass.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
81 lines
2.8 KiB
Python
81 lines
2.8 KiB
Python
"""Tree all-reduce kernel for IPCQ-based PE collective (ADR-0023).
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Two-phase binary tree all-reduce:
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Phase 1 (reduce up):
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- leaf nodes send their value to ``parent``
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- internal nodes recv from each child, sum, then send to ``parent``
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- root accumulates child contributions; final acc holds global sum
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Phase 2 (broadcast down):
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- root sends acc to ``child_left`` and ``child_right`` (if present)
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- internal nodes recv from ``parent``, then forward to children
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- all ranks store the final acc to HBM
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Uses TensorHandle math (PE_MATH) for accumulation. Op_log captures the
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data flow so Phase 2 produces correct final HBM contents. The kernel
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deliberately avoids the store→reload→send pattern: math/recv handles
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are passed directly to the next send so PE_DMA snapshots a deterministic
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source addr that Phase 2 can replay.
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"""
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from __future__ import annotations
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def kernel_args(world_size: int, n_elem: int) -> tuple:
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"""Return the positional kernel arguments for the ahbm backend."""
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return (n_elem, world_size)
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def kernel(t_ptr, n_elem, world_size, tl):
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"""Tree all-reduce.
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Args:
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t_ptr: HBM base address.
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n_elem: number of f16 elements per tile.
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world_size: total number of participating ranks (passed by host).
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tl: TLContext (ADR-0022). Global rank from program_id(0/1).
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"""
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local_pe = tl.program_id(axis=0)
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cube_id = tl.program_id(axis=1)
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pes_per_cube = tl.num_programs(axis=0)
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rank = cube_id * pes_per_cube + local_pe
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nbytes = n_elem * 2
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pe_addr = t_ptr + rank * nbytes
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acc = tl.load(pe_addr, shape=(n_elem,), dtype="f16")
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# Compute children/parent existence (matches tree_binary topology generator)
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has_parent = rank > 0
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left = 2 * rank + 1
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right = 2 * rank + 2
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has_left = left < world_size
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has_right = right < world_size
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# ── Phase 1: reduce up ──
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if has_left:
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recv = tl.recv(dir="child_left", shape=(n_elem,), dtype="f16")
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acc = acc + recv
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if has_right:
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recv = tl.recv(dir="child_right", shape=(n_elem,), dtype="f16")
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acc = acc + recv
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if has_parent:
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# Send the math/load handle directly — its addr is either the
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# original HBM tile (leaf) or the PE-local scratch where the
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# accumulator lives. Phase 2 ipcq_copy replays from the same addr.
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tl.send(dir="parent", src=acc)
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# ── Phase 2: broadcast down ──
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if has_parent:
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# Replace acc with the value broadcast from the parent (the global
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# sum). The recv handle points at the parent-direction TCM slot.
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acc = tl.recv(dir="parent", shape=(n_elem,), dtype="f16")
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if has_left:
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tl.send(dir="child_left", src=acc)
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if has_right:
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tl.send(dir="child_right", src=acc)
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# Final store to HBM for the bench's verification path.
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tl.store(pe_addr, acc)
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