ywkang

ywkang pushed to master at ywkang/kernbench2

2026-05-22 18:15:39 +00:00

e33e76f2d1 adr: add INDEX.md (auto-generated by tools/generate_adr_index.py)

ywkang pushed to master at ywkang/kernbench2

2026-05-22 17:52:43 +00:00

bd49c93703 adr: add ADR-0050-0053 — close /report's second-pass G4 candidates

ywkang pushed to master at ywkang/kernbench2

2026-05-22 17:25:08 +00:00

9a02955770 adr: add ADR-0046-0049 — close G4 coverage gaps from /report

ywkang pushed to master at ywkang/kernbench2

2026-05-21 23:29:46 +00:00

5f8dd688f5 adr: add ADR-0045 (bench module contract — registration, dispatch, authoring)

ywkang pushed to master at ywkang/kernbench2

2026-05-20 21:54:22 +00:00

e77e4a1703 types: narrow BenchResult.engine to GraphEngine, cast topology in engine_factory

ywkang pushed to master at ywkang/kernbench2

2026-05-20 21:43:29 +00:00

1f36baa898 ADR: add 0038-0042 (pcie_ep, pe_mmu, pe_tcm, sram, tiling)

049e3d8bb3 benches: package as kernbench.benches, add @bench registry + list subcommand

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ywkang pushed to master at ywkang/kernbench2

2026-05-20 15:18:03 +00:00

168b0c89f0 ADR: translate adr-ko/ to Korean, fix ADR-0013 slug, refine Status check

ywkang pushed to master at ywkang/kernbench2

2026-05-20 08:38:58 +00:00

a796c1d2f7 ADR: bilingual structure — EN canonical in adr/, KO mirror in adr-ko/

ywkang pushed to master at ywkang/kernbench2

2026-05-20 08:16:03 +00:00

687c98086d ADR housekeeping: category prefixes, lifecycle folders, retroactive 0034-0037

ywkang pushed to master at ywkang/kernbench2

2026-05-19 18:42:53 +00:00

22fd0d2b9d ADR: introduce docs/history/, merge 0011+0018, prune migration cruft

ywkang pushed to master at ywkang/kernbench2

2026-05-18 19:08:16 +00:00

ecc57d050d CLAUDE.md: restructure into Part 1 (general) / Part 2 (project-specific)

ywkang pushed to master at ywkang/kernbench2

2026-05-15 16:43:12 +00:00

a76487ca48 PE_DMA perf: SIP-wide scenarios + dual outputs + clearer naming

ywkang pushed to master at ywkang/kernbench2

2026-05-15 15:53:02 +00:00

a143925a12 PE_DMA perf: dual-peak utilisation (single-path + aggregate)

ywkang pushed to master at ywkang/kernbench2

2026-05-15 14:59:45 +00:00

0bf220fed0 Switch PE_DMA perf plots to Effective BW utilization

ywkang pushed to master at ywkang/kernbench2

2026-05-15 08:23:43 +00:00

a759d58007 Add PE_DMA latency-breakdown plots + self-verification harness

ywkang pushed to master at ywkang/kernbench2

2026-05-15 08:04:35 +00:00

b8213d43a9 ADR-0019 D1/D4: per-PE HBM CTRL partitioning

ywkang pushed to master at ywkang/kernbench2

2026-05-15 07:18:51 +00:00

aaa1cbfaf6 ADR-0033 D6: address-based PC selection at HBM CTRL

ywkang pushed to master at ywkang/kernbench2

2026-05-15 06:24:03 +00:00

a44f832be5 Regenerate latency plots/diagrams for post-Phase-2c model

a0cccc71e8 Add HW architecture overview (Korean)

32b29a1e5c ADR-0003/0014: generalize "router mesh" to "NOC"

c9bd5387ac ADR-0033 D6: reorder future work by workload impact

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ywkang pushed to master at ywkang/kernbench2

2026-05-15 06:20:14 +00:00

9beb140eaa ADR-0033 D6: clarify what multi-flow merging actually models

c6788788a4 ADR-0033 Phase 2c-3 finish: op_log test + ADR doc reflect chunk-streaming

6824a935c9 Calibrate 3 tests for ADR-0033 Phase 2c per-flit wire timing

4929040cf1 Phase 2c-2/3: per-flit wire timing + flit-aware routers + HBM CTRL

b31b3e8248 Phase 2c-1: wire chunkifies into Flits + reassembly compat layer

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ywkang pushed to master at ywkang/kernbench2

2026-04-28 20:31:10 +00:00

533e699299 IPCQ-DMA co-design HW design doc + fix IPCQ slot BW model