Add PE-level IPCQ collective infra + unified ccl_allreduce bench (ADR-0023)

Major changes:

PE-level IPCQ infrastructure:
- New PE_IPCQ component: ring-buffer control plane with 4-direction
  neighbor mapping, head/tail pointers, backpressure (poll/sleep).
- PE_DMA extended with vc_comm channel for IPCQ outbound/inbound DMA,
  including in-flight data snapshot (D9) and op_log recording at
  outbound time for Phase 2 replay correctness.
- IpcqDmaToken piggyback model: data + metadata travel together,
  atomic visibility at receiver (invariant I6).
- Credit return fast path: bottleneck-BW latency, no fabric vc_comm.

Phase 2 data execution (ADR-0020 integration):
- op_log extended: DmaWriteCmd now captures src_space/src_addr for
  Phase 2 dma_write copy; ipcq_copy ops recorded at outbound time.
- DataExecutor replays dma_write + ipcq_copy in t_start order.
- Engine._flush_data_phase: incremental cursor-based replay after
  each engine.wait() so host reads see post-Phase-2 data.
- KernelRunner Phase 1 writes disabled when op_log is active to
  prevent stale data from corrupting the MemoryStore snapshot.

TLContext / kernel API:
- tl.send(dir, src=TensorHandle), tl.recv(dir, shape, dtype),
  tl.recv_async, tl.wait(RecvFuture), copy_to_dst mode.
- TensorHandle operator overloading (add/sub/mul/div) via thread-local
  active TLContext → MathCmd dispatch through PE_MATH.
- PE-local scratch allocator for math output handles.
- tl.load returns space="hbm" handles for correct Phase 2 addressing.
- Additional math functions: maximum, minimum, fma, clamp, softmax, cdiv.

Unified ccl_allreduce bench (PyTorch-compat host code):
- Single benches/ccl_allreduce.py with run() + worker(rank, ws, torch)
  split matching real PyTorch DDP worker pattern.
- torch.distributed facade: init_process_group, get_world_size,
  get_rank, get_backend, all_reduce, barrier — only real PyTorch names.
- AhbmCCLBackend: eager install_ipcq at init, all_reduce dispatches
  kernel via tensor shard metadata (n_elem from shards[0].nbytes).
- world_size derived from topology spec (sips × cubes × pes_per_cube)
  with optional algorithm-level override in ccl.yaml.

Tensor API (PyTorch-compat surface):
- Tensor.numpy(): gather-aware (all shards via VA-based addressing).
- Tensor.copy_(source): scatter from host tensor into sharded target.
- RuntimeContext.from_numpy(arr): host-side staging tensor.
- Tensor.data property fixed to use numpy() (was shards[0]-only).

Algorithm modules moved to src/kernbench/ccl/algorithms/:
- ring_allreduce, mesh_allreduce, tree_allreduce, hello_send.
- Each module exports kernel_args(world_size, n_elem) helper.
- ccl.yaml module paths updated to kernbench.ccl.algorithms.*.

Dead code removed:
- 7 per-variant bench files (ccl_allreduce_{tcm,hbm,sram}, etc.).
- _run_ccl_bench greenlet-per-SIP scheduler.
- benches.loader.is_ccl_bench + run_rank detection.
- benches/ccl/ directory.

Tests:
- New test_ccl_allreduce_matrix.py: 7 parametrized cases
  (ring×3 buffers, ring 8/16, mesh 4, tree 7).
- New test_runtime_api_tensor.py: copy_/numpy/from_numpy unit tests.
- Existing tests updated for new import paths + world_size_override.

Docs:
- Korean ccl-author-guide.md and ADR-0023 paths updated.
- New English versions: ccl-author-guide.en.md, ADR-0023.en.md.

502 tests pass.

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
This commit is contained in:
2026-04-12 19:36:59 -07:00
parent ff2c677a9c
commit 998cc85762
60 changed files with 9196 additions and 80 deletions
@@ -0,0 +1,29 @@
"""Hello-world CCL kernel for the docs/ccl-author-guide.md walkthrough.
Each PE sends its tile to the E neighbor and receives one tile from W,
then stores the received tile back into its own HBM slice. The simplest
possible demonstration of ``tl.send`` / ``tl.recv``.
"""
from __future__ import annotations
def kernel_args(world_size: int, n_elem: int) -> tuple:
"""Return the positional kernel arguments for the ahbm backend."""
return (n_elem,)
def kernel(t_ptr, n_elem, tl):
local_pe = tl.program_id(axis=0)
cube_id = tl.program_id(axis=1)
pes_per_cube = tl.num_programs(axis=0)
rank = cube_id * pes_per_cube + local_pe
nbytes = n_elem * 2
pe_addr = t_ptr + rank * nbytes
# Send our local HBM tile to the E neighbor.
src = tl.load(pe_addr, shape=(n_elem,), dtype="f16")
tl.send(dir="E", src=src)
# Receive a tile from W and store it into our slice (overwrite).
recv = tl.recv(dir="W", shape=(n_elem,), dtype="f16")
tl.store(pe_addr, recv)
@@ -0,0 +1,73 @@
"""2D-mesh all-reduce kernel (ADR-0023).
Two-phase reduce on a square mesh of side ``S`` (world_size = S*S):
1. Row reduce: ring all-reduce along E/W within each row.
2. Column reduce: ring all-reduce along N/S within each column.
After both phases, every rank holds the global sum.
Uses TensorHandle math (PE_MATH) for accumulation. Op_log captures the
data flow so Phase 2 produces correct final HBM contents. Math/recv
handles are passed directly to the next send, avoiding store→reload
which doesn't propagate correctly with timing-only Phase 1 math.
"""
from __future__ import annotations
import math
def kernel_args(world_size: int, n_elem: int) -> tuple:
"""Return the positional kernel arguments for the ahbm backend.
Mesh all-reduce requires ``world_size`` to be a perfect square —
the mesh side length is ``sqrt(world_size)``.
"""
side = int(round(math.sqrt(world_size)))
if side * side != world_size:
raise ValueError(
f"mesh_allreduce requires a square world_size; got {world_size}"
)
return (n_elem, side)
def kernel(t_ptr, n_elem, side, tl):
"""All-reduce on a square mesh.
Args:
t_ptr: HBM base address (column-sharded VA shared across ranks)
n_elem: number of f16 elements per tile
side: mesh side length (sqrt(world_size))
tl: TLContext (ADR-0022).
"""
local_pe = tl.program_id(axis=0)
cube_id = tl.program_id(axis=1)
pes_per_cube = tl.num_programs(axis=0)
rank = cube_id * pes_per_cube + local_pe
nbytes = n_elem * 2
pe_addr = t_ptr + rank * nbytes
acc = tl.load(pe_addr, shape=(n_elem,), dtype="f16")
current = acc
# ── Phase 1: row ring (E direction) ──
# Ring forwards each received tile (not the cumulative acc) so every
# tile passes through every rank exactly once.
for _ in range(side - 1):
tl.send(dir="E", src=current)
recv = tl.recv(dir="W", shape=(n_elem,), dtype="f16")
acc = acc + recv
current = recv
# Phase 2 column ring starts from the row-phase accumulator. We do NOT
# store/reload here — the math handle's scratch addr is the source for
# the first column send and Phase 2 ipcq_copy replays from there.
current = acc
# ── Phase 2: column ring (S direction) ──
for _ in range(side - 1):
tl.send(dir="S", src=current)
recv = tl.recv(dir="N", shape=(n_elem,), dtype="f16")
acc = acc + recv
current = recv
tl.store(pe_addr, acc)
@@ -0,0 +1,80 @@
"""Ring all-reduce kernel for IPCQ-based PE collective (ADR-0023).
Algorithm: 1D ring of N PEs, each PE starts with one tile of data.
After ``world_size - 1`` rounds, every PE's accumulator holds the sum
of all PE tiles.
Strategy
--------
Each PE starts with its own tile in HBM. The kernel:
1. Loads the local tile into a TensorHandle (the accumulator).
2. In each of ``world_size - 1`` rounds:
- Sends the current accumulator/recv slot to the E neighbor.
- Receives a tile from the W neighbor — the recv handle points
into the per-direction TCM slot.
- Adds the received tile to the accumulator using the TensorHandle
operator overload, which dispatches to ``MathCmd`` (PE_MATH).
3. Stores the final accumulator back to HBM via tl.store. The store is
recorded in op_log with both src and dst, so Phase 2 will copy the
replayed math result from PE-local scratch into HBM.
ADR-0020 D3 split: Phase 1 simulates timing only — math results are
not yet computed, so the accumulator data flowing through Phase 1 may
be stale. Phase 2's DataExecutor replays math + IPCQ copies + dma_write
in stable t_start order, producing correct final HBM contents.
"""
from __future__ import annotations
def kernel_args(world_size: int, n_elem: int) -> tuple:
"""Return the positional kernel arguments for the ahbm backend.
Ring all-reduce takes (n_elem, world_size) after the tensor pointer.
"""
return (n_elem, world_size)
def kernel(t_ptr, n_elem, world_size, tl):
"""Ring all-reduce.
Args:
t_ptr: HBM base address of the column-sharded tensor — all PEs
share this base. The per-PE slice lives at
``t_ptr + global_rank * n_elem * 2``.
n_elem: number of f16 elements per tile.
world_size: total number of participating ranks (passed by host).
tl: TLContext (auto-injected, ADR-0022). The kernel derives the
global rank from ``program_id(axis=0)`` (local PE) and
``program_id(axis=1)`` (cube id):
rank = cube_id * pes_per_cube + local_pe
"""
local_pe = tl.program_id(axis=0)
cube_id = tl.program_id(axis=1)
pes_per_cube = tl.num_programs(axis=0)
rank = cube_id * pes_per_cube + local_pe
nbytes = n_elem * 2 # f16
# Each PE reads from its own slice of the shared base address
pe_addr = t_ptr + rank * nbytes
# Load the local tile — handle points at HBM[pe_addr].
acc = tl.load(pe_addr, shape=(n_elem,), dtype="f16")
# The ring forwards each received tile to the next neighbor (NOT the
# cumulative accumulator), so every rank's tile passes through every
# rank exactly once. The accumulator sums the new arrival each round.
current = acc
for _step in range(world_size - 1):
tl.send(dir="E", src=current)
recv = tl.recv(dir="W", shape=(n_elem,), dtype="f16")
# TensorHandle add → MathCmd → PE_MATH (timing in Phase 1, real
# numpy in Phase 2 via DataExecutor). The result handle lives at
# an auto-allocated PE-local scratch addr.
acc = acc + recv
current = recv # forward W's tile to E next round
# Final result back to this PE's HBM slice. Op_log captures the
# source (scratch addr) and dst (HBM slice) so Phase 2 copies the
# accumulated value into HBM for verification.
tl.store(pe_addr, acc)
@@ -0,0 +1,80 @@
"""Tree all-reduce kernel for IPCQ-based PE collective (ADR-0023).
Two-phase binary tree all-reduce:
Phase 1 (reduce up):
- leaf nodes send their value to ``parent``
- internal nodes recv from each child, sum, then send to ``parent``
- root accumulates child contributions; final acc holds global sum
Phase 2 (broadcast down):
- root sends acc to ``child_left`` and ``child_right`` (if present)
- internal nodes recv from ``parent``, then forward to children
- all ranks store the final acc to HBM
Uses TensorHandle math (PE_MATH) for accumulation. Op_log captures the
data flow so Phase 2 produces correct final HBM contents. The kernel
deliberately avoids the store→reload→send pattern: math/recv handles
are passed directly to the next send so PE_DMA snapshots a deterministic
source addr that Phase 2 can replay.
"""
from __future__ import annotations
def kernel_args(world_size: int, n_elem: int) -> tuple:
"""Return the positional kernel arguments for the ahbm backend."""
return (n_elem, world_size)
def kernel(t_ptr, n_elem, world_size, tl):
"""Tree all-reduce.
Args:
t_ptr: HBM base address.
n_elem: number of f16 elements per tile.
world_size: total number of participating ranks (passed by host).
tl: TLContext (ADR-0022). Global rank from program_id(0/1).
"""
local_pe = tl.program_id(axis=0)
cube_id = tl.program_id(axis=1)
pes_per_cube = tl.num_programs(axis=0)
rank = cube_id * pes_per_cube + local_pe
nbytes = n_elem * 2
pe_addr = t_ptr + rank * nbytes
acc = tl.load(pe_addr, shape=(n_elem,), dtype="f16")
# Compute children/parent existence (matches tree_binary topology generator)
has_parent = rank > 0
left = 2 * rank + 1
right = 2 * rank + 2
has_left = left < world_size
has_right = right < world_size
# ── Phase 1: reduce up ──
if has_left:
recv = tl.recv(dir="child_left", shape=(n_elem,), dtype="f16")
acc = acc + recv
if has_right:
recv = tl.recv(dir="child_right", shape=(n_elem,), dtype="f16")
acc = acc + recv
if has_parent:
# Send the math/load handle directly — its addr is either the
# original HBM tile (leaf) or the PE-local scratch where the
# accumulator lives. Phase 2 ipcq_copy replays from the same addr.
tl.send(dir="parent", src=acc)
# ── Phase 2: broadcast down ──
if has_parent:
# Replace acc with the value broadcast from the parent (the global
# sum). The recv handle points at the parent-direction TCM slot.
acc = tl.recv(dir="parent", shape=(n_elem,), dtype="f16")
if has_left:
tl.send(dir="child_left", src=acc)
if has_right:
tl.send(dir="child_right", src=acc)
# Final store to HBM for the bench's verification path.
tl.store(pe_addr, acc)