ywkang
fc6abbc8ee
- CHANGES.md: detailed changelog for release 1 and 2 - README.md: full project docs with install, probe, run, test usage - SPEC.md: add ADR-0014~0017 references, update R7 for pcie_ep endpoint - ADR-0003: update NOC description to reference ADR-0017 - ADR-0004: add HBM efficiency factor (0.8) to BW guarantee contract - ADR-0014: status Proposed -> Accepted - ADR-0015: update D4 to M_CPU bypass for Memory R/W, add ADR-0016/0017 links - ADR-0016 (new): IOChiplet NOC and memory data path - ADR-0017 (new): Cube NOC 2D mesh architecture - Fix MD lint warnings (unfenced code blocks) across all docs Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
82 lines
3.5 KiB
Markdown
82 lines
3.5 KiB
Markdown
# Changelog
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## Release 2 (2026-03-19)
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### Probe CLI Improvements
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- **Restructured output**: tables are printed first (H2D, D2H, PE DMA), followed
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by detailed per-hop route traces below. This makes it easier to scan summary
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numbers before diving into routing details.
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- **Per-hop timestamps**: each route trace now shows cumulative nanosecond
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timestamps at every hop, so you can see exactly where time is spent.
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- **D2H Read section**: added `MemoryReadMsg`-based D2H read probes. D2H models
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the full round-trip: forward command path (pcie_ep → hbm) + reverse data path
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(hbm → pcie_ep) with host-side drain.
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- **Cross-cube best/worst split**: PE DMA cross-cube case is now reported as two
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separate rows — best case (adjacent cube) and worst case (farthest cube) — to
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show the latency range.
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- **Multi-size BW saturation sweep**: each probe case now includes a saturation
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table showing utilization at 4KB, 16KB, 64KB, 256KB, and 1MB. This reveals
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the data size threshold (~64KB) where overhead becomes negligible and
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utilization exceeds 90%.
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- **Default data size changed from 4KB to 32KB** for more realistic baseline
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measurements.
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### UCIe Overhead Tuning
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- UCIe `overhead_ns` increased from 1.0 to **8.0 ns per port** (16ns per
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crossing = TX + RX). This fixes a latency inversion where cross-cube PE DMA
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(which traverses UCIe) was incorrectly faster than cross-half PE DMA (which
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traverses xbar bridges). Applied to both cube-to-cube UCIe and IO chiplet UCIe.
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### HBM Efficiency Factor
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- Added `efficiency: 0.8` parameter to `hbm_ctrl` in `topology.yaml`.
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- The topology builder now applies this multiplicative factor to xbar→hbm edge
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bandwidth: `256 GB/s × 0.8 = 204.8 GB/s` effective.
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- This models real-world DRAM access inefficiency (refresh, bank conflicts,
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page misses) rather than assuming ideal spec bandwidth.
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### IOChiplet NOC and D2H Topology
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- H2D MemoryWrite and D2H MemoryRead now route through `io_noc` (IO chiplet
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NOC), bypassing `m_cpu`. The `m_cpu` path is reserved for KernelLaunch.
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- IOChiplet topology includes: `io_noc`, per-PHY `io_ucie` nodes, and `conn`
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nodes for NOC-to-UCIe bridging.
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- Added comprehensive tests for IOChiplet structure, H2D/D2H data paths,
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and latency invariants.
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### NOC Mesh, Crossbar, and BW Occupancy
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- Added `noc_2d_mesh_v1` component with Manhattan-distance-based internal
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routing.
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- Added `xbar_v1` crossbar component with top/bottom halves and bridge
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interconnect.
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- Added BW occupancy model to wires: each directed edge tracks
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`available_at` for back-to-back serialization contention.
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- Cube mesh visualization diagram (`docs/diagrams/cube_mesh_view.svg`).
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### Test Coverage
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- **278 tests** passing across 16 test files.
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- New test files: `test_bw_occupancy.py`, `test_iochiplet_noc_d2h.py`,
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`test_noc_mesh.py`.
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- New probe tests: monotonic D2H latency, D2H >= H2D invariant, HBM
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efficiency verification, sweep saturation, cross-cube best/worst ordering,
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per-hop timestamp monotonicity.
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---
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## Release 1 (initial)
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- Core simulation engine (SimPy-based discrete-event)
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- Topology builder with YAML-driven configuration
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- Physical address encoding/decoding
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- XY routing on 4x4 cube mesh
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- Component model: pcie_ep, io_cpu, m_cpu, pe_cpu, pe_scheduler, pe_dma,
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pe_gemm, pe_math, pe_tcm, hbm_ctrl, noc, xbar, sram
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- Runtime API: MemoryWriteMsg, MemoryReadMsg, PeDmaMsg, KernelLaunchMsg
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- Probe CLI for latency analysis
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- Benchmark runner with device enumeration
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- Benchmarks: QKV GEMM (single/multi-PE), IPCQ AllReduce
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