ywkang
357cab525b
DPPolicy no longer carries a cross-SIP axis. SIP-level placement is solely controlled by torch.ahbm.set_device(rank) (ADR-0024); DPPolicy itself describes only the cube × PE layout within one SIP. ShardSpec switches to structural (sip, cube, pe) coordinates; the flat pe_index field/property is fully removed — silent drift between global-flat and SIP-local interpretations was a foot-gun flagged by ADR-0024 D11. Breaking API (explicit TypeError / AttributeError): - DPPolicy(sip=...) / DPPolicy(num_sips=...) -> TypeError - ShardSpec.pe_index -> AttributeError - ShardSpec(pe_index=...) -> TypeError - resolve_dp_policy now takes target_sip= (required), no num_sips. Downstream migration: - PE allocator dict keyed by (sip, cube, pe) tuples, in both _ensure_allocators and _free_tensor. deploy_tensor uses tuple lookup. - _create_tensor passes target_sip=current_sip; post-hoc pe_index shifting removed entirely. - launch._compute_local_shape drops the dp.sip branch. - Internal resolvers (column_wise / row_wise / replicate / tiled_*) return _LocalPeShard (cube-local identifier) instead of ShardSpec — resolve_dp_policy lifts them to full structural coords. Tests: - New tests/test_adr0026_dppolicy_intra_device.py (12 tests) pins the contract end-to-end. - test_sip_parallel.py rewritten: SIP composition now modeled as two resolve_dp_policy(target_sip=...) calls (ADR-0024 launcher style). - Call-site migration: test_tensor, test_va_integration, test_va_offset, test_runtime_api_tensor, test_tl_recv_async, test_ccl_* and benches gemm_single_pe, gpt3_qkv, va_offset_verify, ccl_allreduce (legacy branch) all use intra-device DPPolicy and structural ShardSpec. Result: 523 passed, 1 strict xfail (ring_default_ws — unchanged ADR-0024 Phase B blocker; architectural fix deferred to ADR-0027). Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
40 lines
1.3 KiB
Python
40 lines
1.3 KiB
Python
"""Single-PE GEMM benchmark via scheduler_v2 (pe_accel).
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Full host-to-PE pipeline:
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Host → PCIE_EP → IO_CPU → M_CPU → PE_CPU → SchedulerV2 → PE_DMA → HBM
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Single PE: num_cubes=1, num_pes=1 via DPPolicy override.
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Both operands use tl.ref (HBM-resident); scheduler_v2 tiles and streams
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per-tile DMA internally.
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Run:
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kernbench run gemm_single_pe
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"""
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from kernbench.policy.placement.dp import DPPolicy
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# GEMM dimensions: (M, K) x (K, N) → (M, N)
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M, K, N = 32, 128, 32
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DTYPE = "f16"
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def _gemm_kernel(a_ptr, b_ptr, out_ptr, M, K, N, tl, DTYPE="f16"):
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"""Single-PE GEMM: out = a @ b. Both operands streamed from HBM by scheduler."""
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M, K, N = int(M), int(K), int(N)
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a = tl.ref(int(a_ptr), shape=(M, K), dtype=DTYPE)
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b = tl.ref(int(b_ptr), shape=(K, N), dtype=DTYPE)
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h = tl.composite(op="gemm", a=a, b=b, out_ptr=int(out_ptr))
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tl.wait(h)
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def run(torch):
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"""Run the single-PE GEMM benchmark."""
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dp = DPPolicy(cube="replicate", pe="replicate",
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num_cubes=1, num_pes=1)
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a = torch.empty((M, K), dtype=DTYPE, dp=dp, name="a")
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b = torch.empty((K, N), dtype=DTYPE, dp=dp, name="b")
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out = torch.empty((M, N), dtype=DTYPE, dp=dp, name="out")
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torch.launch("gemm_single_pe", _gemm_kernel, a, b, out, M, K, N)
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